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fn7558 rev.6.00 nov 8, 2017 zl8800 dual channel/dual phase pmbus chargemode control dc/dc digital controller datasheet fn7558 rev.6.00 page 1 of 88 nov 8, 2017 the zl8800 is a dual output or dual phase digital dc/dc controller. each output can oper ate independently or be used together in a dual phase co nfiguration for high current applications. the zl8800 supports a wide range of output voltages (0.54v to 5.5v) operating from input voltages as low as 4.5v up to 14v. with the fully digital chargemo de? control, the zl8800 will respond to a transient load step within a single switching cycle. this unique compensation-free modulation technique allows designs to meet transient specif ications with minimum output capacitance, thus saving cost and board space. the proprietary single wire digital-dc? (ddc) serial bus enables the zl8800 to communicate between other intersil ics. by using the ddc, the zl8800 achieves complex functions such as inter-ic phase current balancing, sequencing, and fault spreading, eliminating complicated power supply managers with numerous external discrete components. the zl8800 features cycle-by-cycle output overcurrent protection. the input voltage, output voltages, and drmos/mosfet driver supply voltages are overvoltage and undervoltage protected. one internal temperature sensor and two external temperature sensors are available for temperature monitoring, one of which is used for under-temperature and over-temperature protection. a snapshot parametric capture feature allows users to take a snapshot of operating and fault data during normal or fault conditions. integrated low dropout (ldo) regulators allow the zl8800 to operate from a single input su pply, eliminating the need for additional linear regulators. th e ldo output can be used to power external drivers or drmos devices. with full pmbus? compliance, the zl8800 is capable of measuring and reporting input vo ltage, input current, output voltage, and output current as well as the device?s internal temperature, two external temperatures, and an auxiliary voltage input. features ? unique compensation-free desi gn, which is always stable ? output voltage range: 0.54v to 5.5v ? input voltage range: 4.5v to 5.5v or 6.5v to 14v ? 1% output voltage accuracy over line, load, and temperature ? chargemode control achieves fast transient response and reduced output capacitance and provides output stability without compensation ? switching frequency rang e: 200khz to 1.33mhz ? proprietary single wire dd c serial bus enables voltage sequencing and fault spreadin g with other intersil ics ? external power supply tracking ? cycle-by-cycle inductor peak current protection ? digital fault protection for output voltage uv/ov, input voltage uv/ov, temperature, and mosfet driver voltage ? 10-bit average output current measurement with adjustable gain settings for sensing wi th high current, low dcr inductors ? 10-bit monitor adc measures in put voltage, input current, output voltage, internal and ex ternal temperature, and driver voltage ? configurable to use standalone mosfet drivers or integrated driver-mosfet (drmos) devices ? nonvolatile memory for storing operating parameters and fault events ? pmbus compliant applications ? servers and storage equipment ? telecom and datacom equipment ? power supplies (memory, dsp, asic, fpga) related literature ? for a full list of related documents, visit our website - zl8800 product page table 1. key differences between family of parts part number dual output dual ph ase ddc current share sps support zl8800 yes yes no no zl8801 no yes yes no zl8802 yes yes yes yes
zl8800 fn7558 rev.6.00 page 2 of 88 nov 8, 2017 table of contents simplified applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 pin configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 pin description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 thermal information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 zl8800 overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 digital-dc architecture overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 power management overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 multimode pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 configurable pins. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 smbus device address selection (sa) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 output voltage and vout_max selection (vset0,1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 switching frequency setting (sync) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 input voltage undervoltage lockout setting (uvlo) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 internal bias regulators and input supply connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 start-up procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 ton_delay and rise times. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 enable pin operation and timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 power-good . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 power management functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 output overvoltage protection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 output prebias protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 output overcurrent protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 current limit configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 input current monitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 thermal overload protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 voltage tracking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 voltage margining . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 external voltage monitoring . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 smbus communications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 digital-dc bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 phase spreading . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 output sequencing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 fault spreading . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 active current sharing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 temperature monitoring using xtemp pin. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 nonvolatile memory and security features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 dc/dc converter design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 power train component selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 monitoring through smbus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 pmbus command summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 pmbus data formats . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 pmbus command detail . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 firmware revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86 revision history. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86 about intersil . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87 package outline drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
zl8800 fn7558 rev.6.00 page 3 of 88 nov 8, 2017 simplified applications figure 1. simplified two output drmos application figure 2. simplified two phase drmos application 9287 9729 =/ 3:0+ 9'' 6'$ 6&/ 3* (1 *1' 3:0/ 9'59 ''& %67 ,6(1$ ,6(1% 9'' ,17(5'(9,&( &20081,&$7,21 30%xv &21752/ $1' 67$786 9,1 9729 6$/57 (1 3* 3:0+ 3:0/ 9'59 ,6(1$ ,6(1% %67 9'' 9287 9729 96(13 96(11 96(13 96(11 ,6/ 9 6: 9 ,1 3:0 (1 *1' 3:0 (1 9 6: 9 ,1 *1' ,6/ 9287 9729 =/ 3:0+ 9'' 6'$ 6&/ 3* (1 *1' 3:0/ 9'59 ''& ,6(1$ ,6(1% ,17(5'(9,&( &20081,&$7,21 30%xv &21752/ $1'67$786 3:0+ 3:0/ 9'59 ,6(1$ ,6(1% 9,1 9,1 9,1 9729 6$/57 (1 3* 96(1396(13 96(1196(11 %67 9'' 9 6: 9 ,1 3:0 (1 *1' %67 9'' 9 6: 3:0 (1 *1' ,6/ ,6/ 9 ,1
zl8800 fn7558 rev.6.00 page 4 of 88 nov 8, 2017 block diagram figure 3. block diagram sda scl salrt xtemp1p/n sync xtemp0p/n ddc vset0 vset1 pwmh0 pwml0 digital-dc inter-device communications i 2 c and smbus serial interface pin-strap resistor detection sa uvlo microcontroller and nonvolatile memory pll clk gen osc ldos pga iinn iinp gain isena1 isenb1 isena0 isenb0 pga i peak / iavg adc i peak / iavg adc pga vsen0p/n ascr digital pwm modulator pwm+ dead time adc vsen1p/n pwmh1 pwml1 vtrkp/n vmon monitor adc mux vdd vdd digital logic + ov/uv/oc/uc comparators pg0/1 en0/1 mgn0/1 dac pga ascr digital pwm modulator pwm+ dead time dac adc iin adc vr5 vr6 vdrv vdrven v25
fn7558 rev.6.00 page 5 of 88 nov 8, 2017 zl8800 schematic figure 4. two phase schematic 9,1 9287 & 287 =/ 3:0+ 3:0+ 9,1 9'' 6'$ 6&/ 3* (1 6*1' '*1' 3:0/ 3:0/ 9'59 ''& 729 9'59 ,6(1$ ,6(1% ,6(1$ ,6(1% ,17(5'(9,&( &20081,&$7,21 237,21$/ 30%xv 237,21$/ &21752/ $1' 67$786 & 287 8 5 n? n? 5 9021 9,1 3*1' %227 9'59 8 3+$6( 9&,1 &*1' 96:+ 3:0 '6% & ?) & & & ?) & ?) ?) [?) [?) & &,1 &,1 / & 5 5 / 6<1& 96(11 96(13 ?) ?) ?) & & 9 9 9 5 5 5 6$ 96(7 89/2 5 p 237,21$/ ,,13 ,,11 5 6<1& 5 n? 9 5 ? 9,1 3*1' %227 9'59 8 3+$6( 9&,1 &*1' 96:+ 3:0 '6% & ?) & ?) 5 ? 5 ? 5 ? 96(13 96(11 ,6/ ,6/
zl8800 fn7558 rev.6.00 page 6 of 88 nov 8, 2017 pin configuration zl8800 (44 ld qfn) top view sgnd vmon dgnd mgn0 mgn1 scl salrt sda vdrv isena1 isenb1 pwml1 pwmh1 pwmh0 vdd vr6 vr5 xtemp1p xtemp1n vsen1p vsen1n pg1 v25 sync en0 en1 xtemp0p xtemp0n vtrkp vsen0p vtrkn vsen0n pg0 ddc uvlo exposed paddle connect to sgnd 12 13 14 15 16 17 18 19 20 1 2 3 4 5 6 7 8 9 33 32 31 30 29 28 27 26 25 21 22 44 43 42 41 40 39 38 37 36 35 34 10 11 23 24 pwml0 isenb0 vdrven isena0 iinp iinn vset0 vset1 sa pin description pin label type ( note 1 )description 1scl i/o serial clock. connect to external host and/or to other zl device s. requires a pull-up resistor to a 2.5v to 5.5v source (vr5 recommended. do not use v25). pull-up supply must be from an ?always on? source or vr5. 2sda i/o serial data. connect to external host and/or to other zl device s. requires a pull-up resistor to a 2.5v to 5.5v source (vr5 recommended. do not use v25). pull-up supply must be from an ?always on? source or vr5. 3salrt o serial alert. connect to external host if desired. requires a pull-up resistor to a 2.5v to 5. 5v source (vr5 recommended. do not use v25). leave floating if not used. 4sgndpwr connect to low impedance ground plane. internal connection to sgnd. all pin-strap resistors should be connected to sgnd. sgnd must be connected to dgnd and pgnd using a single point connection. 5sa m serial address select pin. used to assign unique address fo r each individual device or to enable certain management features. see table 3 on page 13 for pmbus address options. connect resistor to sgnd. 6vmon i external voltage monitoring (can be used for external driver bias (vdrv) monitoring). requires an external 16:1 resistor divider network. 6.65k/100k recommended. 7dgndpwr digital ground. connect to low impedance ground plane. 8mgn0 i channel 0 margin pin. 9mgn1 i channel 1 margin pin. 10 vset0 m channel 0 output voltage selection pin. used to set v out0 and v out0 max. see table 4 on page 13 for v out pin-strap options. default v out max is 115% of v out setting, but this can be overridden through the pmbus interface with the vout_max command. connec t resistor to sgnd. 11 vset1 m channel 1 output voltage selection pin. used to set v out1 and v out1 max. see table 4 on page 13 for v out pin-strap options. default v out max is 115% of v out setting, but this can be overridden through the pmbus interface with the vout_max command. connect resistor to sgnd. not used in 2-phase mode. leave floating in 2-phase mode. 12 pg0 o channel 0 power-good output.
zl8800 fn7558 rev.6.00 page 7 of 88 nov 8, 2017 13 uvlo m undervoltage lockout selection. sets the minimum value for v dd voltage to enable v out . see table 6 on page 14 for uvlo setting options. pin-strapped (configured) values can be overridden by the pmbus interface. connect resistor to sgnd. if enabling the device by tying the en0 and/or en1 pins high (self-enabling), set the uvlo level to 16v with a 100k resistor so the device will not turn on until after a configuration file has been loaded. 14 ddc i/o single wire ddc bus (current sharing, inte r device communication). pull up to vrs. 15 xtemp0p i external temperature sensor input for channel 0. connect to external 2n3904 (base emitter junction) or equivalent embedded thermal diode. if not used, connect to sgnd. 16 xtemp0n i external temperature sensor input for channe l 0 return. if not used, connect to sgnd. 17 vtrkp i tracking sense positive input. used to track an ex ternal voltage source. if not used, connect to sgnd. 18 vtrkn i tracking sense negative input (return). if not used, connect to sgnd. 19 vsen0p i differential output channel 0 voltage sense feedba ck. connect to positive output regulation point. 20 vsen0n i differential output channel 0 voltage sense feedba ck. connect to negative output regulation point. 21 vdrven i vdrv (mosfet driver bias supply) enable. leave unconnected (flo at) or pull-up to vr5 to enable, tie to ground to disable. 22 isena0 i positive differential voltage input for channel 0 dcr current sensing. 23 isenb0 i negative differential voltage input for channel 0 dcr current sensing. 24 pwml0 o pwm0 low signal/drmos enable. 25 pwmh0 o pwm0 high signal. 26 pwmh1 o pwm1 high signal. 27 pwml1 o pwm1 low signal/drmos enable. 28 isenb1 i negative differential voltage input for channel 1 dcr current sensing. 29 isena1 i positive differential voltage input for channel 1 dcr current sensing. 30 vdrv pwr mosfet driver bias supply regulator output. 10f recommended. 31 vr6 pwr internal 6v reference used to power internal circuitry. 10f recommended. 32 vr5 pwr internal 5v reference used to power internal circuitry. 10f recommended. 33 vdd pwr supply voltage. 34 iinn i input current monitor negative input. 35 iinp i input current monitor positive input. 36 v25 pwr internal 2.5v reference used to power internal circuitry. 37 pg1 o channel 1 power-good output. 38 vsen1n i differential output channel 1 voltage sense feedback. must be connected to negative output regulation point in 2-channel or 2-phase mode. 39 vsen1p i differential output channel 1 voltage sense feedback. must be connected to positive output regulation point in 2-channel or 2-phase mode. 40 xtemp1n i external temperature sensor input for channel 1 return. if not used connect to sgnd. 41 xtemp1p i external temperature sensor input for channel 1. connect to external 2n3904 (base emitter junction) or equivalent embedded thermal diode. if not used connect to sgnd. 42 en0 i enable channel 0. active signal enables pwm0 switching. recommended to be tied low during device configuration. 43 en1 i enable channel 1. active signal enables pwm1 switching. recommended to be tied low during device configuration. 44 sync m/i/o clock synchronization input. used to set the frequency of the internal clock, to sync to an external clock, or to output to an internal clock. pad sgnd pwr exposed thermal pad. connect to low impedance ground plane. internal connection to sgnd. note: 1. i = input, o = output, pwr = power or ground, m = multimode pins. pin description (continued) pin label type ( note 1 )description
zl8800 fn7558 rev.6.00 page 8 of 88 nov 8, 2017 ordering information part number ( notes 2 , 3 , 4 ) part marking firmware revision ( note 5 ) temp. range (c) tape and reel (units) package (rohs compliant) pkg. dwg. # recommended for new designs ZL8800ALAFTK 8800 1.04 -40 to +85 1k 44 lead qfn l44.7x7b n zl8800alaft 8800 1.04 -40 to +85 4k 44 lead qfn l44.7x7b n zl8800alaft7a 8800 1.04 -40 to +85 250 44 lead qfn l44.7x7b n zl8800albft 8800 1.06 -40 to +85 4k 44 lead qfn l44.7x7b y zl8800albftk 8800 1.06 -40 to +85 1k 44 lead qfn l44.7x7b y zl8800albft7a 8800 1.06 -40 to +85 250 44 lead qfn l44.7x7b y zl8800-2ch-demo1z demonstration board, 2 independent 30a synchronou s buck converters with compen sation-free chargemode control zl8800-2ph-demo1z demonstration board, 2-ph ase 60a synchronous buck converter with compensation-free chargemode control notes: 2. refer to tb347 for details about reel specifications. 3. these pb-free plastic packaged products employ special pb-free ma terial sets, molding compounds/ die attach materials, and 100 % matte tin plate plus anneal (e3 termination finish, which is rohs compliant and compatible with both snpb and pb-free soldering operations). pb -free products are msl classified at pb-free peak reflow temperatures that meet or exceed the pb-free requirements of ipc/jedec j std-020. 4. for moisture sensitivity level (msl), refer to the zl8800 product information page. for more information about msl, refer to tb363 . 5. see ? firmware revision history ? on page 86 . only the latest firmware revision is recommended for new designs. f a a zl8800 t l product designator package designator a = qfn package operating temperature range l = -40c to +85c firmware revision (alpha character) lead finish f = lead-free matte tin shipping option contact factory for other options tk = tape and reel - 1000 pcs t = tape and reel - 4000 pcs a: 1.04 b: 1.06 t7a = tape and reel - 250 pcs
zl8800 fn7558 rev.6.00 page 9 of 88 nov 8, 2017 absolute maximum rating s thermal information dc supply voltage: vdd. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3v to 17v logic i/o voltage: ddc, en0, en1, mgn0, mgn1, pg0, pg1, sa, vdrven, salrt, scl, sda, sync, uvlo, vmon, vset0, vset1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3v to 6.0v analog input voltages: vsen0p, vsen0n, vsen1p, vsen1n, vtrkp, vtrkn, isena0, isena1, isenb0, isenb1 . . . . . . -0.3v to 6.5v xtemp0p, xtemp1p . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3v to 6.0v xtemp0n, xtemp1n . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3v to 0.3v iinn, iinp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3v to 17v logic reference : v25 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3v to 3v bias supplies: vr5, vr6, vdrv. . . . . . . . . . . . . . . . . . . . . . . . . -0.3v to 6.5v pwm logic outputs, pwmh0, pwmh1, pwml0, pwml1 . . .-0.3v to 6.5v ground voltage differential (vdgnd-vsgnd) . . . . . . . . . . . . . . . .-0.3v to +0.3v esd ratings human body model (tested per jesd22-a114e) . . . . . . . . . . . . . . 3000v machine model (tested per jesd22-a115-a) . . . . . . . . . . . . . . . . . . 200v charged device model (tested per jesd22-c1010-d) . . . . . . . . . . 1000v latch-up (tested per jesd78c; class 2, level a) . . . . . . . . . . . . . . . 100ma thermal resistance (typical) ? ja (c/w) ? jc (c/w) 44 ld qfn package ( notes 7 , 8 ) . . . . . . . . 25 1.5 storage temperature range . . . . . . . . . . . . . . . . . . . . . . . .-55c to +150c pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see tb493 recommended operating conditions input supply voltage range, v dd . . . . . . . . . . . . . . . . . . . . . . . . 4.5v to 14v output voltage range, v out . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.54v to 5.5v operating junction temperature range, t j . . . . . . . . . . . .-40c to +125c ambient temperature range, t a . . . . . . . . . . . . . . . . . . . . . -40c to +85c 5v (vr5) supply total supplied current ( note 9 ) . . . . . . . . . . . . . . . . . 5ma 5v ldo supply (vdrv) ( note 6 ) . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to 80ma caution: do not operate at or near the maximum ratings listed for extended periods of time. exposure to such conditions may adv ersely impact product reliability and result in failures not covered by warranty. notes: 6. output current is limited by device thermal dissipation. 7. ? ja is measured in free air with the compon ent mounted on a high-effective thermal cond uctivity test board with ?direct attach? fe atures. refer to tb379 . 8. for ? jc , the ?case temp? location is the center of the exposed metal pad on the package underside. 9. total of current used by pull-ups to sda, scl, salr t, ddc, en, and pg (including push-pull configuration). electrical specifications v dd = 12v. typical values are at t a = +25c. boldface limits apply across the operating ambient temperature range, t a -40c to +85c parameter test conditions min ( note 15 )typ max ( note 15 )unit ic input and bias supply characteristics idd supply current f sw = 200khz - 26 50 ma f sw = 1.33mhz - 50 80 ma idd device disabled current en = 0v, smbus inactive, v dd = ? 12v, f sw ? = ? 400khz - 20 30 ma vr5 reference output voltage v dd > 6v, i < 5ma 4.5 5.0 5.5 v v25 reference output voltage for reference only, vr > 3v 2.25 2.5 2.75 v vr6 reference output voltage for reference only, v dd = 12v 5.5 6.1 6.6 v vdrv 5v output voltage ( note 10 )v dd > 6.0v; 0-80ma 4.5 5.25 5.5 v output characteristics output voltage adjustment range v in > v out + 1.8v 0.54 - 5.5 v output voltage set-point accuracy ( note 12 ) across line, load, te mperature variation 0.72 < v out <5.50 -1 - 1 % v out output voltage set-point resolution ( note 11 ) set using pmbus command - 0.025 - % v out output voltage positive sensing bias curr ent vsen[0,1] p = 4v (negative = sinking) -100 20 100 a output voltage negative sensing bi as current vsen[0,1] n = 0v - 20 - a logic input/output characteristics logic input leakage current logic i/o - multimode pins -100 - 100 na logic input low, v il -- 0.8 v logic input high, v ih 2 --v logic output low, v ol 2ma sinking - - 0.5 v logic output high, v oh 2ma sourcing 2.25 --v
zl8800 fn7558 rev.6.00 page 10 of 88 nov 8, 2017 pwm input/output characteristics pwm output low 2ma sinking - - 0.5 v pwm output high 2ma sourcing 4.25 --v pwm tri-state input bias current (pwmh0,1) v pwm = 2.5v - - 10 a oscillator and switching characteristics switching frequency range 200 - 1334 khz switching frequency set-point accuracy -5 - 5 % minimum sync pulse width 50% to 50% 150 --ns input clock frequency drift tolerance maximum allowed drift of external clock -10 - 10 % pmbus clock frequency ( note 13 ) 100 - 400 khz power management soft-start/ ramp characteristics t on delay/t off delay factory default - 5 - ms t on delay/t off delay range set using pmbus command 2 5000 ms ramp delay/t off delay accuracy turn-on, turn-off delay - -0/+2 - ms soft-start/t on ramp/t off ramp duration factory default - 5 - ms soft-start/t on ramp/t off ramp duration range set using pmbus command 0.5 100 ms soft-start/t on ramp/t off ramp duration accuracy - 250 - s tracking vtrk input bias current vtrk = 5v - 70 200 a vtrk regulation accuracy ( note 16 ) 100% tracking, v out ? vtrk -2 - 2 % v out power-good power-good v out threshold factory default - 90 - % v out power-good v out hysteresis factory default - 5 - % power-good delay applies to turn-on only (low to high transition) factory default - 1 - ms set using pmbus command 0 - 5000 ms monitoring and fault management input voltage monitor and fault detection v dd /v in uvlo threshold range 2.85 - 16 v v dd /v in monitor accuracy full scale (fs) = 14v - 2 - % fs v dd /v in monitor resolution full scale (fs) = 14v - 0.15 - % fs v in uv/ov fault response delay - 100 - s input current input current sense differential input voltage v iinp - v iinn 0 - 20 mv input current sense input offset voltage v iinp - v iinn -100- v input current sense accuracy % of full scale (20mv) - 5 - % fs output voltage monitor and fault detection v out monitor accuracy fs = v set voltage (v o ) -2 - 2 % fs v out monitor resolution fs = v set voltage (v o ) - 0.15 - % fs v out uv/ov fault response delay -10- s electrical specifications v dd = 12v. typical values are at t a = +25c. boldface limits apply across the operating ambient temperature range, t a -40c to +85c (continued) parameter test conditions min ( note 15 )typ max ( note 15 )unit
zl8800 fn7558 rev.6.00 page 11 of 88 nov 8, 2017 output current output current-sense resolution low range 25mv full scale - 37.5 - v medium range 35mv full scale - 56.25 - v high range 50mv full scale - 75.0 - v output current-sense input bias current v out referenced isena0 or isena1 -100 - 100 na isenb0 or isenb1 -25 - 25 a output current-sense monitor and fault detection output current dcr monitor temperature compensation factory default 3900 ppm/c configurable using pmbus 100 12700 ppm/c vmon bias monitor and fault detection vmon uvlo threshold range using vmon pin with 16:1 resistor divider 2.85 - 5 v vmon accuracy ( note 14 ) full scale (fs) = 1.15v -2 - 2 % fs vmon resolution full scale (fs) = 1.15v - 0.15 - % fs vmon uv/ov fault response delay - 200 - s temperature sensing internal temperature sensor internal temperature accuracy tested at +100c -5 ? 5 c internal temperature resolution -1-c thermal protection threshold (junction temperature) factory default - 125 - c configurable using pmbus -40 ? 125 c thermal protection hysteresis -15- c external temperature sensor: xtemp0 and xtemp1 external temperature accuracy filter capacitance <100pf - 5 - c external temperature resolution -1-c thermal protection threshold factory default - 125 - c configurable using pmbus -40 ? 125 c thermal protection hysteresis -15- c notes: 10. output current is limited by device thermal dissipation. 11. percentage of full scale (fs) with temperature compensation applied. 12. v out measured at the termination of th e vsenxp and vsenxn sense points. 13. for operation at 400khz, see pmbus power system management prot ocol specification part 1, section 5.2.6.2 for timing paramet er limits. 14. does not include errors due to resistor divider tolerances. 15. compliance to datasheet limits is assured by one or more methods: production test, characterization, and/or design. 16. only one output voltage can track the vtrk input: channe l 0, channel 1, or the output of a 2-phase configuration. electrical specifications v dd = 12v. typical values are at t a = +25c. boldface limits apply across the operating ambient temperature range, t a -40c to +85c (continued) parameter test conditions min ( note 15 )typ max ( note 15 )unit
zl8800 fn7558 rev.6.00 page 12 of 88 nov 8, 2017 zl8800 overview digital-dc architecture overview the zl8800 is an innovative mixe d-signal power conversion and power management ic based on pa tented digital-dc technology that provides an integrated, high performance step-down converter for a wide variety of power supply applications. the zl8800 dc/dc controller is a dual channel, dual phase controller based on an architectu re that does not require loop compensation. adaptive algorithms enable the power converter to automatically change the operatin g state to increase efficiency and overall performance with no user interaction needed. the zl8800?s full digital loop achieves precise control of the entire power conversion proce ss with no software required, resulting in a very flexible device that is also very easy to use. the chargemode control algorithm responds to output current changes within a single pwm switching cycle, achieving a smaller total output voltage variation with less output capacitance than traditional pwm controllers. an extensive set of power management functions is fully integrated and can be configured using simple pin conn ections. the user configuration can be saved in an internal nonvolatile memory (nvm). additionally, all functions can be configured and monitored through the smbus hardware interface using standard pmbus commands, allowing ultimate flexibility. the zl8800 is compliant with the pmbus power system management protocol specification part i and ii version 1.2. when enabled, the zl8800 is im mediately ready to regulate power and perform power management tasks with no programming required. advanced configuration options and real-time configuration change s are available through pmbus commands if desired, and continuous monitoring of multiple operating parameters is possible with minimal interaction from a host controller. integrated subreg ulation circuitry enables single supply operation from any supply between 4.5v and 14v with no bias supplies needed. the zl8800 can be configured by simply connecting its pins according to the tables provid ed in the following sections. additionally, a comprehe nsive set of online tools and application notes are available to help si mplify the design process. a demonstration board is also ava ilable to help the user become familiar with the device. this board can be evaluated as a standalone platform using pi n configuration settings. a windows-based graphical user interface (gui) enables full configuration and monitoring capability through the smbus interface and the included usb cable. power management overview the zl8800 incorporates a wide range of configurable power management features that are simple to implement with no external components. additionally, the zl8800 includes circuit protection features that continuous ly safeguard the device and load from damage due to unexpected system faults. the zl8800 can continuously monitor input voltage and current, output voltage and current, internal temperature, and the temperature of two external thermal diodes. a power-good output signal is also included to enable power-on reset functionality for an external processor. all power management functions ca n be configured using either pin configuration techniques de scribed in this document or through the smbus interface using pmbus commands. monitoring parameters can also be preconfigured to provide alerts for specific conditions. the ? pmbus command summary ? on page 25 contains a listing of all the pmbus commands supported by the zl8800 and a deta iled description of the use of each of these commands. multimode pins to simplify circuit design, the zl8800 incorporates patented multimode pins that allow the us er to easily configure many aspects of the device with no programming. most power management features can be configured using these pins. the multimode pins can respond to four different connections as shown in table 2 . these pins are sampled when power is applied. pin-strap settings: this is the simplest implementation method, because no external components are required. using this method, each pin can take on one of three possible states: low, open, or high. these pins can be connected to the v25 pin for logic high settings (excluding vdrven, which should be left floating). using a single pin, one of three settings can be selected. resistor settings: this method allows a greater range of adjustability when connecting a finite value resistor (in a specified range) between the multimode pin and sgnd. standard 1% resistor values are used, and only every fourth e96 resistor value is used so the device can reliably recognize the value of resistance connected to the pin while eliminating the error associated with the resistor accuracy. up to 31 unique selections are available using a single resistor. table 2. multimode pin configuration pin tied to value low (logic low) < 0.8 vdc open (n/c) no connection high (logic high) > 2.0 vdc resistor to sgnd set by resistor value figure 5. pin-strap and resistor settings multimode pin pin-strap settings resistor settings multimode pin logic high open logic low v25
zl8800 fn7558 rev.6.00 page 13 of 88 nov 8, 2017 smbus: almost any zl8800 function can be configured through the smbus interface using standard pmbus commands. additionally, any value that has been configured using the pin-strap or resistor setting me thods can also be reconfigured and/or verified through smbus. the ? pmbus command detail ? on page 29 section of this document explains the use of the pmbus commands in detail. configurable pins four operating parameters can be set using the pin-strap or resistor setting method: smbus address (pin 5, sa), output voltage (pins 10 and 11, vset0,1), switching frequency (pin 44, sync), and input voltage undervoltage lockout (pin 13, uvlo). the smbus device address and the output voltage are the only parameters that must be set by external pins. all other device parameters can be set through pmbus. the device address is set using the sa pin. the output voltage is set using the vset0 and vset1 pins. smbus device address selection (sa) when communicating with multiple smbus devices using the smbus interface, each device mu st have its own unique address so the host can distinguish be tween the devices. the device address can be set according to the pin-strap options listed in table 3 . because the zl8800 is a 2-channel device, the next higher sequential address afte r the selected zl8800 address should not be used by any device on the smbus. for example, if address 0x26 is used, 0x27 should not be used by any device sharing the same smbus (see the ? ddc_config (d3h) ? command for details). the smbus address cannot be changed with a pmbus command. output voltage and vout_max selection (vset0,1) the output voltage can be set to any voltage between 0.54v and 5.5v if the input voltage is higher than the desired output voltage by at least 1.1v. using the pin-strap method, v out can be set to any of the voltages shown in table 4 . v out can also be set using a pmbus command. vout_max is also determined by this pin-strap setting, and is 10% greater than the vset0 and vset1 voltage settings. switching frequency setting (sync) the device?s switching frequenc y can be set from 200khz to 1333khz using the pin-strap method shown in table 5 , or by using a pmbus command. the zl8800 generates the device switching frequency by dividing an internal precision 16mhz clock by integers from 11 to 80.500khz (n = 32) and 1000khz (n = 16) are not recommended operating frequencies; use 533khz and 1067khz for best performance. table 3. smbus device address selection rsa (k ? ) smbus address rsa (k ? ) smbus address low 0x26h 42.2 0x28h open 0x28h 46.4 0x29h 10 0x19h 51.1 0x2ah 11 0x1ah 56.2 0x2bh 12.1 0x1bh 61.9 0x2ch 13.3 0x1ch 68.1 0x2dh 14.7 0x1dh 75 0x2eh 16.2 0x1eh 82.5 0x2fh 17.8 0x1fh 90.9 0x30h 19.6 0x20h 100 0x31h 21.5 0x21h 110 0x32h 23.7 0x22h 121 0x33h 26.1 0x23h 133 0x34h 28.7 0x24h 147 0x35h 31.6 0x25h 162 0x36h 34.8 0x26h 178 0x37h 38.3 0x27h table 4. output voltage settings rvset (k ? ) vout (v) rvset (k ? )vout (v) low 1.00 38.3 1.30 open 1.20 42.2 1.40 high 2.50 46.4 1.50 10 0.60 51.1 1.60 11 0.65 56.2 1.70 12.1 0.70 61.9 1.80 13.3 0.75 68.1 1.90 14.7 0.80 75 2.00 16.2 0.85 82.5 2.10 17.8 0.90 90.9 2.20 19.6 0.95 100 2.30 21.5 1.00 110 2.50 23.7 1.05 121 2.80 26.1 1.10 133 3.00 28.7 1.15 147 3.30 31.6 1.20 162 4.00 34.8 1.25 178 5.00 table 5. device switch ing frequency settings rsync (k ? )freq (khz) rsync k ? freq (khz) sgnd 200 23.7 471 open 400 26.1 533 high 1067 28.7 571 10 200 31.6 615 11 222 34.8 727 12.1 242 38.3 800 13.3 267 42.2 842
zl8800 fn7558 rev.6.00 page 14 of 88 nov 8, 2017 the zl8800 incorporates an internal phase-locked loop (pll) to clock the internal circuitry. the pll can be driven by an external clock source connected to the sync pin. when using the internal oscillator, the sync pin can be configured as a clock source for other intersil devices. by default, the sync pin is configured as an input. the device will automatically check for a clock sign al on the sync pin each time en is asserted. the zl8800?s oscillator will then synchronize with the rising edge of the external clock. the incoming clock signal must be in the range of 200khz to 1.33mhz and must be stable when the enable pin (en0, en1) is asserted. when using an external clock, the frequencies are not limited to discrete values as when using the internal clock. the external clock signal must not vary more than 10% from its initial value, and should have a minimum pulse width of 150ns. in the event of a loss of the external clock signal, the output voltage may show transient overshoot or undershoot. if synchronization loss occurs, the zl8800 will automatically switch to its internal oscillato r and switch at its programmed frequency. the sync pin can also be configured as an output. the device will run from its internal oscillator and will drive the sync pin so other devices can be synchronized to it. the sync pin will not be checked for an incoming clock signal while in this mode. the switching frequency can be set to any value between 200khz and 1.33mhz using a pmbus command. the available frequencies below 1.33mhz are defined by f sw = 16mhz/n, where 11 n 80. if a value other than f sw = 16mhz/n is entered using a pmbus command, the internal circuitry will select the switching frequency value using n as a whole number to achieve a value close to the entered value. for example, if 810khz is entered, the device will select 800khz (n = 20). input voltage undervoltage lockout setting (uvlo) the input undervoltage lockout (uvlo) prevents the zl8800 from operating when the input falls belo w a preset threshold, indicating the input supply is out of its sp ecified range. the input voltage undervoltage lockout threshold can be set between 2.85v and 16v using the pin-strap method shown in table 6 . uvlo can also be set or changed using the vin_uv_fault_limit command. when an input undervoltage fault condition occurs, the user can determine the desired response to the fault condition. the following input undervoltage pr otection response options are available: ? shut down and stay off until the fault has cleared and the device has been disabled and reenabled ? shut down and attempt to restar t when the fault is no longer present ? shut down and restart continuously after a delay the default response from an unde rvoltage fault is to shut down and stay off until the fault has cleared and the device has been disabled and reenabled (option 1). refer to ? pmbus command detail ? on page 29 for details on how to select specific overvoltage fault response options using the vin_uv_fault_response command. when controlling the zl8800 exclusively through the pmbus, a high voltage setting for uvlo can be used to prevent the zl8800 from being enabled until a lower voltage for uvlo is set using the vin_uv_fault_limit command. internal bias regulators and input supply connections the zl8800 uses internal low drop out (ldo) regulators to supply bias voltages for internal circuitr y, allowing it to operate from a single input supply. the following lists describes the internal bias regulators: vr6 : the vr6 ldo provides a regulated 6.1v bias supply for internal circuitry. it is powered from the vdd pin. a 4.7f ceramic x5r or x7r filter capacito r to sgnd is required at the vr6 pin. 10f is recommended. vr5 : the vr5 ldo provides a regulated 5.1v bias supply for internal circuitry. it is powered from the vdd pin. a 4.7f ceramic x5r or x7r filter capacito r to sgnd is required at the vr5 pin. 10f is recommended. this supply can be used to provide a pull-up supply as long as the load current does not exceed 5ma. 14.7 296 46.4 889 16.2 320 51.1 1067 17.8 364 56.2 1143 19.6 400 61.9 1231 21.5 421 68.1 1333 table 5. (continued) device switching frequency settings rsync (k ? )freq (khz) rsync k ? freq (khz) table 6. input voltage undervoltage lockout threshold settings ruvlo (k ? ) uvlo (v) ruvlo (k ? ) uvlo (v) low not used 46.4 7.42 open 4.5 51.1 8.18 high 10.8 56.2 8.99 26.1 4.18 61.9 9.90 28.7 4.59 68.1 10.90 31.6 5.06 75 12.00 34.8 5.57 82.5 13.20 38.3 6.13 90.9 14.54 42.2 6.75 100 16.00
zl8800 fn7558 rev.6.00 page 15 of 88 nov 8, 2017 v25 : the v25 ldo provides a regulated 2.5v bias supply for the main controller circuitry. it is powered from an internal 5v node. a 4.7f ceramic x5r or x7r filter capacitor to sgnd is required at the v25 pin. vdrv : the vdrv ldo provides a regulated, 5.25v bias supply for external mosfet driver ics or drmos integrated drivers/fets. a 4.7f ceramic x5r or x7r filter capacitor to pgnd is required (10f is recommended). however, additional capacitance will be needed as specified by the mosfet driver or drmos device selected. the maximum rated output current is 80ma, but device thermal limits must be considered. the power dissipated by the vdrv supply will be (vin - 5.25v) x idrv, where idrv is the current supplied by the vdrv bias supply. vdrv is enabled by leaving the vdrven unconnected (floating) or connecting it to vr5, and is disabled by co nnecting vdrven to ground. note: the internal bias regulators, vr6, vr5, and v25, are not designed to be outputs for powering other circuitry. the multimode pins can be connected to the v25 pin for logic high settings, and the vr5 supply can be used to provide up to 5ma of pull-up current for the sda, scl, salrt, ddc, and pg pins. start-up procedure the zl8800 follows a specific internal start-up procedure after power is applied to the vdd pin, as shown in figure 6 . the device requires approximately 70ms to check for specific values stored in its internal memory. if the user has stored values in memory, those values will be loaded. after this process is completed, the device is ready to accept commands through the serial interface and is ready to be enabled. if the device is synchronized to an external clock source, the clock frequency must be stable prior to asserting the en pin. when enabled, the device requires approximately 2ms before the output voltage starts its ramp-up process. after the ton_delay period has expired, the output will begin to ramp towards its target voltage according to the preconfigured ton_rise time. ton_delay and rise times in some applications, it may be necessary to set a delay from when an enable signal is received until the output voltage starts to ramp to its target value. in addition, the designer may wish to precisely set the time required for v out to ramp to its target value after the delay period has expired. these features can be used as part of an overall inrush current management strategy or to precisely control how fast a load ic is turned on. the zl8800 gives the system designer several options for precisely and independently controlling both th e delay and ramp time periods. the ton_delay time begins when the en pin is asserted. the ton_delay time is set using the pmbus command ton_delay. the ton_rise time enables a precisely controlled ramp to the nominal v out value that begins when the ton_delay time has expired. the ramp-up is monotonic and its slope can be precisely set using the pmbus command ton_rise. the ton_delay and ton_ramp times can be set using pmbus commands ton_delay and ton_ rise over the serial bus interface. when the ton_delay time is set to 0ms, the device will begin its ramp after the internal circuitry has initialized. the ton_delay and ton_ramp times can be set using pmbus commands ton_delay and ton_rise over the serial bus interface. when the ton_delay time is set to 0ms, the device will begin its ramp after the internal circuitry has initialized, which takes approximately 2ms to complete. the ton_rise time can be set to values less than 2ms, however the ton_rise time should be set to a value greater than 500s to prevent inadvertent fault conditions due to excessive inrush currents. a lower ton_rise time limit can be estimated using the formula: ton_rise = c out *v out /i limit where c out is the total output capacitance, v out is the output voltage, and i limit is the current limit setting for the zl8800. enable pin operation and timing the enable pins (en0 and en1) are used to enable and disable each channel of the zl8800. when operated as a 2-phase converter, use en0 and ground en1. the enable pins should be held low whenever a configuration file or script is used to configure the zl8800, or when a pmbus command is sent that could potentially damage the application circuit. when the zl8800 is used in a self-enabled mode, for example, when en0 or en1 is tied to vr5, or to a resistor divider to vin, the user must consider the zl8800's default factory settings. when a configuration file is used to configure the zl8800, the factory default settings are restored to both the user and default stores to set the zl8800 to an initializ ed state. because the default state of the zl8800 is to be enabled when the enable pin is high, it is possible for the zl8800 to be enabled while the pmbus commands are sent to the zl 8800 during the configuration process. when operating the ic in 2 channel mode, avoid transitioning en0 or en1 high within 1ms of the beginning of the opposite channel?s start-up ramp. for ex ample, if the page 0 output (vsen0, pwm) begins to ramp-up at the end of a ton_delay of 5ms, en1 should not transition high between 4ms and 6ms. power-good the zl8800 provides a power-good (pg0, pg1) signal for each channel that indicates the output voltage is within a specified tolerance of its target level an d no fault condition exists. by default, the pg pin will assert if the output is within 10% of the figure 6. zl8800 internal start-up procedure input power applied internal memory check 60ms to 70ms device will ignore an enable signal or pmbus commands device ready pre-ramp delay minimum 2ms delay between enable signal and start of output ramp. additional delay may be added with pmbus command
zl8800 fn7558 rev.6.00 page 16 of 88 nov 8, 2017 target voltage. these limits and the polarity of the pin can be changed using pmbus commands. the vout_uv_fault_limit must always be set to a value lower than power_good_on. a pg delay period is defined as the time from when all conditions within the zl8800 for asserting pg are met to when the pg pin is actually asserted. this feature is commonly used instead of using an external reset controller to control external digital logic. by default, the zl8800 pg delay is set equal to 1ms. the pg delay can be set using a pmbus command as described in the ? pmbus command summary ? on page 25 . power management functional description output overvoltage protection the zl8800 offers an internal output overvoltage protection circuit that can be used to protect sensitive load circuitry from being subjected to a voltage higher than its prescribed limits. a hardware comparator is used to compare the actual output voltage (seen at the vsen pin) to a programmable threshold set to 15% higher than the target outp ut voltage (the default setting). if the vsen voltage exceeds this threshold, the pg pin will deassert and the device can then respond in a number of ways as follows: ? shut down and stay off until the fault has cleared and the device has been disabled and reenabled ? shut down and, when the fault is no longer present, attempt to restart ? shut down and restart continuously after a delay the default response from an over voltage fault is to immediately shut down with no retries (option 1). refer to ? pmbus command detail ? on page 29 for details about how to select specific overvoltage fault response options using the vout_ov_fault_response command. output prebias protection an output prebias condition exis ts when an externally applied voltage is present on a power supply's output before the power supply's control ic is enabled. certain applicatio ns require that the converter not be allowed to si nk current during start-up if a prebias condition exists at the output. the zl8800 provides prebias protection by sampling the output voltage prior to initiating an output ramp. if a prebias voltage lower than the desired output voltage is present after the ton_delay time, the zl8800 starts switching with a duty cycle that matches the prebias voltage. this ensures that the ramp-up from the preb ias voltage is monotonic. the output voltage is then ramped to the desired output voltage at the ramp rate set by the ton_rise command. the resulting output voltage rise time will vary depending on the prebias voltage, but the total ti me elapsed from the end of the ton_delay time to when the ton_rise time is complete and the output is at the desired va lue will match the preconfigured ramp time (see figure 7 ). if a prebias voltage higher than th e target voltage exists after the preconfigured ton_delay time and ton_rise time have completed, the zl8800 starts swit ching with a du ty cycle that matches the prebias voltage. th is ensures that the ramp-down from the prebias voltage is monotonic. the output voltage is then ramped down to the desired output voltage. if a prebias voltage higher than the overvoltage limit exists, the device will not initiate a turn-on sequence and will stay off with an output ov fault recorded. output overcurrent protection the zl8800 can protect the power supply from damage if the output is shorted to ground or if an overload condition is imposed on the output. after the current limit threshold has been selected (see ? current limit configuration ? on page 17 ), the user can determine the desired response to the fault condition. the following overcurrent protection response options are available: ? shut down and stay off until the fault has cleared and the device has been disabled and reenabled ? shut down and, when the fault is no longer present, attempt to restart ? shut down and restart continuously after a delay the default response from an over current voltage fault is to shut down and stay off until the faul t has cleared and the device has been disabled and reenabled (option 1). refer to the ? pmbus command detail ? section for details on how to select specific overvoltage fault response options using the iout_oc_fault_response command. figure 7. output responses to prebias voltages ton delay ton rise desired output voltage pre-bias voltage v out time ton delay ton rise desired output voltage pre-bias voltage v out time v prebias < v target v prebias > v target
zl8800 fn7558 rev.6.00 page 17 of 88 nov 8, 2017 current-sensing components the zl8800 uses the inductor dc r current-sensing technique. current sensing is achieved by selecting an r/c network as shown in figure 8 . for the voltage across c 1 to reflect the voltage across the dcr of the inductor, the time constant of the inductor must match the time constant of the rc network. that is: for l , use the average of the nominal value and the minimum value. include the effects of tolerance, dc bias, and switching frequency on the inductance when determining the minimum value of l . use the typical room temperature value for dcr . the value of r 1 should be as small as feasible and no greater than 5k for best signal-to-noise rati o. the designer should make sure the resistor package size is appropriate for the power dissipated and include this loss in efficiency calculations. when calculating the minimum value of r 1 , the average voltage across c 1 (which is the average i out ? dcr product) is small and can be neglected. therefore, the minimum value of r 1 can be approximated by the following equation: where p r1 is the maximum power dissipation specification for the resistor. after r1 min has been calculated, solve for the maximum value of c 1 from: and choose the next-lowest readily a v ailable value (for example, for c1 max = 1.86f, c 1 = 1.5f is a good choice ), then substitute the chosen value into the same equation and recalculate the value of r 1 . choose the 1% resistor standard value closest to this recalculated value of r 1 . current limit configuration the zl8800 gives the power supply designer several choices for the fault response during over or undercurrent condition. the user can select the number of violations allowed before declaring fault, a blanking time and the action taken when a fault is detected. these parameters are configured using the isense_config command. the blanking time represents the time when no current measurement is taken. this is to avoid taking a reading just after a current load step (less accurate due to potential ringing). it is a configurable parameter from 0 to 832ns. the zl8800 provides an adjustab le, maximum full scale sensing range. three ranges are availa ble: 25mv, 35mv, and 50mv maximum input voltage. by default, current-sensing is enabled during the inductor current down slope period of the switchin g period (d?). in applications where the steady state duty cycle is >0.5, for example, a 5v to 3.3v converter, the zl8800 can be configured to sense current during the inductor up slope period of the switching cycle (d). the user has the option of se lecting how many consecutive overcurrent readings must occur before an overcurrent fault and subsequent shutdown are initiated. either 1, 3, 5, 7, 9, 11, or 13 consecutive faults can be selected. after the isense_config parameters have been selected, the user must select the desired cu rrent limit thresholds and the resistance of the sensing element. the current limit thresholds are set with four commands: ? iout_oc_fault_limit ? this sets the overcurrent threshold that must be exceeded by the number of consecutive times chosen in isense_config. ? iout_uc_fault_limit ? this is the same as iout_oc_fault_limit, but represents the negative current that flows lower fet during the d? interval. large negative currents can flow during faults such as a higher voltage rail being shorted to a lower voltage rail. ? iout_avg_oc_fault_limit ? this limit is similar to iout_oc_fault_limit, but the limit represents an average reading over several switching cycles. because it is an average, the response time is slower, but the limit can be set closer to the maximum average expected output current. ? iout_avg_uc_fault_limit ? this limit is similar to iout_avg_oc_fault_limit, but represents the negative current that flows lower fet during the d? interval. input current monitor the input current can be monitored through the iinn and iinp pins. when no input current is being measured through the iinn and iinp pins, the input current can be estimated using the measured duty cycle and measured average output current. fault detection is not allowed using the estimated input current. this estimation is enabled by setting iin_scale to zero. the input current monitor input should be connected across a current-sensing resistor in series with the input supply. the iinp pin is connected to the input supply side of the current-sense resistor, and the iinn pin is conne cted to the zl8800 vdd side of the current-sense resistor. using the iin_scale command, set the current-sense resistor value. select the current-sense resistor value such that the maximum expected input current times the current-sense resistor value does not exceed the maximum current-sensing input voltage of 20mv. if this feature is not used, iinn and iinp should be tied to vdd. figure 8. dcr current sensing vout gh gl zl8800 pwmh pwml vdrv bst isena isenb vdd vin r1 c1 l driver dcr l c r dcr l rc ? ? ? 1 1 / ? ? ???? 1 2 2 min 1 1 r out out in p v d v v d r ? ? ? ? ? dcr r l c ? ? min max 1 1
zl8800 fn7558 rev.6.00 page 18 of 88 nov 8, 2017 thermal overload protection the zl8800 includes an on-chip th ermal sensor that continuously measures the internal temperature of the die. this thermal sensor is used to provide both over-t emperature and under-temperature protection. if the over-temperatu re limit is exceeded, or the temperature falls below the unde r-temperature limit, the zl8800 is shut down. the over-temperatu re and under-temperature limits are set by the ot_fault_limit and ut_fault_limit, respectively. the zl8800 will not attempt to rest art until the temperature falls below the ot_warn_limit for over-temperature faults or rises above the ut_warn_limit for un der-temperature faults. the default temperature limits are +1 25c and -45c, but the user can set the limits to different values if desired. note that setting a higher over-temperature or under- temperature limit may result in permanent damage to the device. when the device has been disabled due to an internal temper ature fault, the user can select one of several fault response options as follows: ? shut down and stay off until the fault has cleared and the device has been disabled and reenabled ? shut down and, when the fault is no longer present, attempt to restart ? shut down and restart continuously after a delay the default response from an over-temperature or under-temperature fault is to shut down and stay off until the fault has cleared and the device has been disabled and reenabled (option 1). refer to ? pmbus command summary ? on page 25 for details about how to select sp ecific overvoltage fault response options using the ot_fault_respons e and ut_fault_response commands. voltage tracking numerous high performance sy stems place stringent demands on the order in which the power supply voltages are turned on. this is particularly true when powering fpgas, asics, and other advanced processor devices that require multiple supply voltages to power a single die. in most ca ses, the i/o interface operates at a higher voltage than the core and therefore, the core supply voltage must not exceed the i/o supply voltage according to the manufacturers' specifications. the zl8800 integrates a tracking scheme that allows one of its outputs (channel 0 or channel 1, or the single output in a dual phase application) to track a volt age that is applied to the vtrk pin with no external components required. the vtrk pin is an analog input that, when the tracki ng mode is enabled, configures the voltage applied to the vtrk pin to act as a reference for the device?s output regulation. figure 9 illustrates the typical connection and the two tracking modes: ? coincident . this mode configures the zl8800 to ramp its output voltage at the same rate as the voltage applied to the vtrk pin until it reaches its desired output voltage. the device that is tracking another output voltage (slave) must be set to its desired steady-state output voltage. ? ratio-metric . this mode configures the zl8800 to ramp its output voltage at a rate that is a percentage of the voltage applied to the vtrk pin. the default setting is 50%, but an external resistor string can be used to configure a different tracking ratio. the device that is tracking another output voltage (slave) must be set to its desired steady-state output voltage. the master zl8800 device in a tr acking group is defined as the device that has the highest target output voltage within the group. this master device will control the ramp rate of all tracking devices and is not conf igured for tracking mode. the maximum tracking rise time is 1v /ms. the slave device must be enabled before the master. any device that is configured for tracking mode will ignore its ton_delay and ton_rise settings and its output will take on the turn-on/turn-off characteristics of the reference voltage present at the vtrk pin. tracking mode can be configured by using the track_config command. note that current sharing groups th at are also configured to track another voltage do not offer preb ias protection; a minimum load should therefore be enforced to avoid the output voltage from being held up by an outside source. figure 9. tracking modes vo2 v out time coincident ratiometric vo1 vo2 q1 q2 l1 c 1 zl8800 vtrk vo1 vo2 time vo1 v in v out
zl8800 fn7558 rev.6.00 page 19 of 88 nov 8, 2017 voltage margining the zl8800 offers a simple method to vary its output higher or lower than its nominal voltage setting to determine whether the load device is capable of operating over its specified supply voltage range. margining is co ntrolled through the operation command. default margin limits of v out 5% are preloaded in the factory, but the margin limits can be modified through pmbus commands to be as high as v out + 10% or as low as 0v, where v out is the nominal output voltage set point determined by the vset pin or the vout_command command. a safety feature prevents the user from configuring the output voltage to exceed v out + 10% under any condition. additionally, the transition ra te between the nominal output voltage and either margin limit can be configured using the vout_transition_rate command. external voltage monitoring the voltage monitoring (vmon) pin can monitor the voltage supply for the external driver ic. the vmon input must be scaled by a 16:1 ratio in order to read -back the vmon voltage correctly. a 100k and 6.65k resistor divider is recommended. overvoltage and undervoltage fault thresholds can be set using the mfr_vmon_ov_fault_limit and mfr_vmon_uv_fault_limit commands. the response to these limits are set using the vmon_ov_fault_response and vmon_ uv_fault_response commands. when the device has been disabled due to a vmon fault, the user can select one of the followi ng fault response options: ? shut down and stay off until the fault has cleared and the device has been disabled and reenabled ? shut down and, when the fault is no longer present, attempt to restart ? shut down and restart continuously after a delay the default response from an ov ervoltage or undervoltage vmon fault is to shut down and stay off until the fault has cleared and the device has been disabled and reenabled (option 1). smbus communications the zl8800 provides a smbus digital interface. the zl8800 can be used with any standard 2-wire smbus host device. in addition, the device is compatible with smbus version 2.0 and includes a salrt line to help reduce bandwidth limitations related to continuous fault monito ring. pull-up resistors are required on the smbus. the pull-up resistor can be tied to vr5 or to an external 3.3v or 5v supply as long as this voltage is present before or during device power-up. the ideal design will use a central pull-up resistor that is well-matched to the total load capacitance. the minimum pull-up resistance should be limited to a value that enables any device to assert the bus to a voltage that will ensure a logic 0 (typically 0.8v at the device monitoring point) given the pull-up voltage (5v if tied to vr5) and the pull-down current capability of the zl8800 (nominally 4ma). a pull-up resistor of 10k is a good value for most applications. smbus data and clock lines shou ld be routed with a closely coupled return or ground plane to minimize coupled interference (noise). excessive noise on the data and clock lines that cause the voltage on these lines to cross the high and low logic thresholds of 2.0v and 0.8v, re spectively, will cause command transmissions to be interrupted an d result in slow bus operation or missed commands. a 10k resistor provides good performance on an smbus with fewer than 10 devices. the zl8800 accepts most standard pmbus commands. when enabling the device with the on_off_config command, it is recommended that the enable pin is tied to sgnd. in addition to bus noise considerat ions, it is important to ensure that user connections to the smbus are compliant to the pmbus command standards. any device that can malfunction in a way that permanently shorts smbus lines will disable pmbus communications. incomplete pmbus commands can also cause the zl8800 to halt pmbus communications. this can be corrected by disabling, then reenabling the device. digital-dc bus the digital-dc communications (ddc) bus is used to communicate between intersil digital-dc devi ces and within the zl8800 itself. this dedicated bus provides th e communication channel between devices for features such as sequencing, fault spreading, and current sharing. the ddc pin must be pulled up to vr5 (or configured as a push-pull output using the global_user_config comman d) even if the zl8800 is operating in standalone. in addition, the ddc pin must be pulled up or configured as a push-pull output before the enable pin is set high. push-pull mode can be used only when the zl8800 is operating in standalone mode. th e ddc pins on all digital-dc devices that use sequencing, faul t spreading, or current sharing must be connected together. th e ddc pins on all digital-dc devices in an application should be connected together. a pull-up resistor is required on the ddc bus to guarantee the rise time as follows: rise time = r pu * c load 1 s where r pu is the ddc bus pull-up resistance and c load is the bus loading. the pull-up resistor mu st be tied to vr5. generally, each device connected to the ddc bus presents approximately 12pf of capacitive loading. th e ideal design will use a central pull-up resistor that is well-matched to the total load capacitance. in power module applications, the user should consider whether to place the pull-up resistor on the module or on the pcb of the end application. the minimum pull-up resistance should be limited to a value that enables any device to assert the bus to a voltage that will ensure a logic 0 (typically 0.8v at the device monitoring point) and the pull-down current capability of the zl8800 (nomina lly 4ma). as with smbus data and clock lines, the ddc data line should be routed with a closely coupled return or ground plane to minimize coupled interference (noise). excessive noise on the ddc signal can cause the voltage on this line to cross the high an d low logic thresholds of 2v and 0.8v, respectively, and will caus e command transmissions to be interrupted and result in slow bus operation or missed commands. for less than 10 devices on the ddc bus, a 10k resistor provides good performance.
zl8800 fn7558 rev.6.00 page 20 of 88 nov 8, 2017 phase spreading when multiple point of load converters share a common dc input supply, it is desirable to adjust the clock phase offset of each device so that not all device s have coincident rising edges. setting each converter to start its switching cycle at a different point in time can dramatical ly reduce input capacitance requirements. since the peak current drawn from the input supply is effectively spread out over a period of time, the peak current drawn at any given moment is reduced and the power losses proportional to i rms 2 are reduced. to enable phase spreading, all converters must be synchronized to the same switching clock. configuring the sync pin is described in ? configurable pins ? on page 13 . selecting the phase offset for the device is accomplished by selecting a device address according to the following calculation: phase offset = device address x 45 this behavior is illustrated in table 7 : the phase offset of each device can also be set to any value between 0 and 360 in 22.5 increments using the interleave pmbus command. output sequencing a group of intersil devices can be configured to power up in a predetermined sequence. this feature is especially useful when powering advanced processors, fpgas, and asics that require one supply to reach its operating voltage prior to another supply reaching its operating voltage to avoid latch-up from occurring. multidevice sequencing can be achieved by configuring each device using the sequence pmbus command. multiple device sequencing is achieved by issuing pmbus commands to assign the preceding device in the sequencing chain as well as the device that will follow in the sequencing chain. the enable (en) pins of all device s in a sequencing group must be tied together and driven high to initiate a sequenced turn-on of the group. enable must be driven low to initiate a sequenced turnoff of the group. sequencing can also be accompli shed by connecting the enable pin of a sequel device to the po wer-good pin of a prequel device. sequencing is also achieved by using the ton_delay and ton_rise commands and choosing appropriate delay and rise durations such that sequel devices start after their associated prequel devices. the drawback to this method is that if a prequel device fails to start properly, its sequel device will still start and ramp on according to its delay and rise time settings. fault spreading digital dc devices can be configured to broadcast a fault event over the ddc bus to the other devices in the group. when a fault occurs and the device is configured to shut down on a fault, the device will shut down and broadcast the fault event over the ddc bus. the other devices on the ddc bus will shut down together if configured to do so, and will atte mpt to restart in their prescribed order if configured to do so. active current sharing the two channels of the zl8800 can be used in parallel to create a dual phase power rail. the device outputs will share the current equally within a few percent. figure 10 shows a typical connection for a dual phase application. when used in this configuration, the zl8800 can current share between phases without using output voltage droop. temperature monitoring using xtemp pin each channel of the zl8800 supports measurement of an external device temperature using either a thermal diode integrated in a processor, fpga, or asic, or using a discrete diode-connected 2n3904 npn transistor. figure 11 on page 21 illustrates the typical connecti ons required. a noise filtering capacitor, not exceeding 100pf, should be connected across the external temperature sensing device. the external temperature sensors can be used to provide the temperature reading for over-temperature and under-temperature faults. the external sensors can also be used to pr ovide more accurate temperature compensation for inductor dcr current sensing by being placed table 7. phase offset address lsb phase offset () address lsb phase offset () 0080 145945 290a90 3135b135 4 180 c 180 5 225 d 225 6 270 e 270 7 315 f 315 figure 10. dual phase example v out zl8800 vin v in driver driver
zl8800 fn7558 rev.6.00 page 21 of 88 nov 8, 2017 close to the inductor. these options for the external temperature sensors are selected using th e user_config pmbus command. nonvolatile memory and security features the zl8800 has internal nonvolatile memory that stores user configurations. integrated securi ty measures ensure that the user can only restore the device to a level that has been made available to them. during the initialization process, the zl8800 checks for stored values contained in its internal non-volatile memory. the zl8800 offers two internal memory storage units that are accessible by the user as follows: ? default store : a power supply module manufacturer may want to protect the module from da mage by preventing the user from being able to modify certai n values that are related to the physical construction of the module. in this case, the module manufacturer would use the default store and would allow the user to restore the device to its default setting but would restrict the user from restoring the device to the factory settings. ? user store : the manufacturer of a piece of equipment may want to provide the ability to modify certain power supply settings while still protecting the equipment from modifying values that can lead to a system level fault. the equipment manufacturer would use the user store to achieve this goal. the user store takes priority over the default store. if there are no values set in the user or default store, the device will use the pin-strap setting value. dc/dc converter design the zl8800 operates as a voltage-mode, synchronous buck converter with a selectable constant frequency pulse width modulator (pwm) control scheme that uses external driver, mosfets, capacitors, and an inductor to perform power conversion. figure 12 illustrates the basic synchronous buck converter topology showing the primary power train components. this converter is also called a step-down converter, as the output voltage must always be lower than the input voltage. dual output pwm per channel the zl8800 has been designed to provide independent upper and lower fet drive signals to a two-input mosfet driver such as the zl1505. the zl8800 uses adaptive dead time control to improve the power conversion efficiency. the zl8800 monitors the power converter?s operating conditions and continuously adjusts the turn-on and turn-off timing of the high-side and low-side driver input signals to optimize the overall efficiency of the power supply. the zl8800 can also be used with single-ended drmos integrated driver and mosfet devices. power supplies using drmos devices can be made sma ller than discrete solutions using separate drivers and mosf ets, but at a slightly lower efficiency. the option to use drmos or drivers and discrete mosfets is set using the user_config command. power train component selection the zl8800 is a dual output or dual phase synchronous buck converter that uses external drivers, mosfets, inductors, and capacitors to perform the power conversion process. the proper selection of the external components is critical for optimized performance. to select the appropriate external components for the desired performance goals, the power supply requirements listed in table 8 must be known. zl xtempxn xtempxp discrete npn 2n3904 zl xtempxn xtempxp embedded thermal diode p fpga dsp asic 100 pf 100 pf figure 11. external temperature monitoring table 8. power supply requirements parameter example value input voltage (v in )12v output voltage (v out )1.2v output current (i out ) 30a output voltage ripple (v orip )1% of v out output load step (i ostep ) 50% of i o output load step rate 10a/s output deviation due to load step 2% maximum pcb temperature 85c desired efficiency 90% other considerations optimize for small size vout zl8800 vin zl1505 l c qh ql figure 12. synchronous buck converter
zl8800 fn7558 rev.6.00 page 22 of 88 nov 8, 2017 design goal trade-offs the design of the buck power stage requires several compromises among size, efficiency , and cost. the inductor core loss increases with frequency, so there is a trade-off between a small output filter made possible by a higher switching frequency and getting better power supply efficiency. size can be decreased by increasing the switching frequency at the expense of efficiency. cost can be minimized by using through-hole inductors and capacitors, however, these components are physically large. to start the design, select a switching frequency based on table 9 . this frequency is a starting point and can be adjusted as the design progresses. inductor selection the output inductor selection process must include several trade-offs. a high inductance value will result in a low ripple current ( i l ), which will reduce output capacitance and produce a low output ripple voltage, but may also compromise output transient load performance. therefore, a balance must be struck between output ripple and optima l load transient performance. a good starting point is to select the output inductor ripple equal to 30 to 50% of the maximum output current (i out ). i l = 0.5* i out now the output inductance can be calculated using the following equation, where v in is the input voltage: the average inductor current is equal to the maximum output current. the peak inductor current (i lpk ) is calculated using the following equation where i out is the maximum output current: select an inductor rated for the average dc current and with saturation current rating above th e peak current calculated above. after an inductor is selected, the dcr and core losses in the inductor are calculated. use the dcr specified in the inductor manufacturer?s datasheet. i lrms is given by: where i out is the maximum output current. next, calculate the core loss of the selected inductor. since this calculation is specific to each inductor and manufacturer, refer to the chosen inductor datasheet. add the core loss and the esr loss and compare the total loss to th e maximum power dissipation recommendation in the inductor datasheet. output capacitor selection several trade-offs must also be considered when selecting an output capacitor. low esr values are needed to have a small output deviation (v step ) during transient load steps and low output voltage ripple ( v). however, capacitors with low esr, such as x5r and x7r dielectric ceramic capacitors, also have relatively low capacitance values. many designs can use a combination of high capacitance devices and low esr devices in parallel. for high ripple currents, a low capacitance value can cause a significant amount of output voltage ripple. likewise, in high transient load steps, a relatively large amount of capacitance is needed to minimize the output voltage deviation while the inductor current ramps up or down to the new steady state output current value. as a starting point, apportion one-half of the output ripple voltage to the capacitor esr and the other half to capacitance, as shown in the following equations: use these values to make an init ial capacitor selection, using a single capacitor or several capacitors in parallel. after a capacitor has been selected, the resulting output voltage ripple can be calculated using the following equation: because each part of this equation was made to be less than or equal to half of the allowed output ripple voltage, the v should be less than the desired maximum output ripple. input capacitor it is highly recommended that dedicated input capacitors be used in any point-of-load design, even when the supply is powered from a heavily filtered 5v or 12v ?bulk? supply from an off-line power supply. this is because of the high rms ripple current that is drawn by the buck converter topology. this ripple (i inrms ) can be determined from the following equation: table 9. circuit design considerations frequency range efficiency circuit size 200 to 400khz highest larger 400 to 800khz moderate smaller 800khz to 1.33mhz lower smallest l sw in out out i f v v v l ? ? ? ? ? ? ? ? ? ? ? ? ? 1 2 i i i out lpk ? ? 2 lrms ldcr i dcr p ? ? ?? 12 2 2 l out lrms i i i ? ? ? 2 8 v f i c sw l out ? ? ? ? ? l i v esr ? ? ? ? 2 out sw l l c f i esr i v ? ? ? ? ? ? ? ? 8 d i i out inrms ? ?
zl8800 fn7558 rev.6.00 page 23 of 88 nov 8, 2017 without capacitive filtering near the power supply circuit, this current would flow through the supply bus and return planes, coupling noise into other system circuitry. the input capacitors should be rated above the ripple current calculated above and the maximum expected input voltage. ql selection the bottom or lower mosfet should be selected with the lowest possible r ds(on) while maintaining the desired circuit size and cost. calculate the rms current in ql as follows: calculate the power dissipated due to r ds(on) as follows: note that the r ds(on) given in the manufacturer?s datasheet is measured at +25c. the actual r ds(on) in the end-use application will be much higher. select a candidate mosfet and calculate the required gate drive current as follows: mosfets with lower r ds(on) tend to have higher gate charge requirements, which increases the current and resulting power required to turn them on and off. qh selection in addition to the r ds(on) loss and gate charge loss, qh also has switching loss. select qh with a lower gate charge, keeping in mind that qh?s r ds(on) will be higher as a result. as was done with ql, calculate the rms current as follows: next, calculate the switching time using: where q g is the gate charge of the selected qh and i dr is the peak gate drive current available from the gate drive ic. to calculate the switching time, use the zl1505s minimum guaranteed drive current of 3 a for a conservative design. using the calculated switching time, calculate the switching power loss in qh using: the total power dissipated by qh is given by the following equation: mosfet thermal check after the power dissipations for qh and ql have been calculated, the mosfet?s junction temperature can be estimated. using the junction-to-case thermal resistance (r th ) given in the mosfet manufacturer?s datasheet and the expected maximum printed circuit board (pcb) temperatur e, calculate the junction temperature as follows: to calculate power losses and junction temperature rise in drmos devices, consult the datasheet and application notes for the drmos device selected. efficiency optimized driver dead time control the zl8800 uses a closed loop algorithm to optimize the dead time applied between the gate drive signals for the top and bottom fets. in a synchronous buck converter, the mosfet drive circuitry must be designed such that the top and bottom mosfets are never in the conduc ting state at the same time. potentially damaging currents flow in the circuit if both top and bottom mosfets are simultaneously on for periods of time exceeding a few nanoseconds. conversely, long periods of time in which both mosfets are off reduce overall circuit efficiency by allowing current to flow in their parasitic body diodes. minimize this dead time to provide optimum circuit efficiency. in the first order model of a buck converter, the duty cycle is determined by the equation: however, the real duty cycle sometimes extends beyond the ideal. dead time can be manipulated to improve efficiency. the zl8800 has an internal algorithm that constantly adjusts dead time nonoverlap to minimize duty cycle, thus maximizing efficiency. this circuit will null out dead time differences due to component variation, temperature, and loading effects. this algorithm is independent of application circuit parameters such as mosfet type, gate driver delays, rise and fall times, and circuit layout. in addition, it does not require drive or mosfet voltage or current waveform meas urements. adaptive dead time is enabled using the deadtime_config pmbus command. adaptive dead time is only effect ive when a discrete driver (such as the zl1505) and mosfets are used. when drmos devices are selected using user_config, adaptive dead time is automatically disabled. dead time minimum and maximum limits can be set using the deadtime pmbus command. monitoring through smbus a system controller can monitor a wide variety of different zl8800 parameters through the smbus interface. the device can monitor for fault conditions by monitoring the salrt pin, which will be asserted when any number of preconfigured fault conditions occur. d i i out qlrms ? ? ? 1 ?? 2 botrms dson ql i r p ? g sw g q f i ? ? d i i out qhrms ? ? ?? 2 qhrms dson qh i r p ? dr g sw i q t ? sw out sw inm swtop f i t v p ? ? ? ? swtop qh qhtot p p p ? ? ?? th q pcb j r p t t ? ? ? max in out v v d ?
zl8800 fn7558 rev.6.00 page 24 of 88 nov 8, 2017 the device can also be monitored continuously for any number of power conversion parameters including but not limited to the following: ?input voltage ?output voltage ?input current ? output current ? internal junction temperature ? temperature of an external device ?switching frequency ? duty cycle ? fault status information the pmbus host should respond to salrt as follows: 1. the zl device pulls salrt low. 2. the pmbus host detects that salrt is now low and performs transmission with alert respon se address to find which zl device is pulling salrt low. 3. the pmbus host talks to the zl device that has pulled salrt low. the actions that the host performs are up to the system designer. if multiple devices are faulting, salrt will still be low after doing the above steps and will require transmission with the alert response address repeatedly until all faults are cleared. refer to the ? pmbus command summary ? on page 25 for details on how to monitor specific parameters through the smbus interface.
zl8800 fn7558 rev.6.00 page 25 of 88 nov 8, 2017 pmbus command summary code command name description type data format default value default setting 00h page selects controller 0, 1, or bo th r/w bit 00h both cont rollers addressed 01h operation enable/disable, margin settings r/w bit 00h immediate off, nominal margin 02h on_off_config on/off configuration settings r/w bit 17h enable pin control, active high 03h clear_faults clears faults write n/a n/a n/a 11h store_default_all stores values to default store write n/a n/a n/a 12h restore_default_all restores values from default store write n/a n/a n/a 15h store_user_all stores values to user store write n/a n/a n/a 16h restore_user_all restores values from user store write n/a n/a n/a 20h vout_mode reports v out mode and exponent read bit 13h linear mode, exponent = -13 21h vout_command sets nominal v out set-point r/w l16u pin-strap setting 23h vout_cal_offset applies offset voltage to v out set-point r/w l16s 0000h 0v 24h vout_max sets maximum v out set-point r/w l16u 1.1 x vout_command pin-strap setting 25h vout_margin_high sets v out set-point during margin high r/w l16u 1.05 x vout_command pin-strap setting 26h vout_margin_low sets v out set-point during margin low r/w l16u 0.95 x vout_command pin-strap setting 27h vout_transition_rate sets v out transition rate during margin commands r/w l11 ba00h 1v/ms 28h vout_droop sets v/i slope r/w l11 0000h 0mv/a 33h frequency_switch sets switching frequency r/w l11 pin-strap setting 37h interleave configures phase offset during group operation r/w bit set by pin-strapped pmbus address 38h iout_cal_gain sets impedance of current sense circuit r/w l11 aa66h 0.3m 39h iout_cal_offset sets an offset to i out sense circuit r/w l11 0000h 0a 40h vout_ov_fault_limit sets the v out overvoltage fault threshold r/w l16u 1.15 x vout_command pin-strap setting 41h vout_ov_fault_response sets the v out overvoltage fault response r/w bit 80h disable, no retry 44h vout_uv_fault_limit sets the v out undervoltage fault threshold. must be set lower than power_good_on r/w l16u 0.85 x vout_command pin-strap setting 45h vout_uv_fault_response sets the v out undervoltage fault response r/w bit 80h disable, no retry 46h iout_oc_fault_limit sets the i out peak overcurrent fault threshold r/w l11 da80h 20a 4bh iout_uc_fault_limit sets the i out valley undercurrent fault threshold r/w l11 dd80h -20a 4fh ot_fault_limit sets the over-tempe rature fault limit r/w l11 ebe8h +125 ? c 50h ot_fault_response sets the over-temperature fault response r/w bit 80h disable, no retry 51h ot_warn_limit sets the over-temperature warning limit r/w l11 eb70h +110c 52h ut_warn_limit sets the under-temperature warning limit r/w l11 dc40h -30c 53h ut_fault_limit sets the under-temp erature fault limit r/w l11 e530h -45c 54h ut_fault_response sets the under-temperature fault response r/w bit 80h disable, no retry 55h vin_ov_fault_limit sets the v in overvoltage fault threshold r/w l11 d380h 14v
zl8800 fn7558 rev.6.00 page 26 of 88 nov 8, 2017 56h vin_ov_fault_response sets the v in overvoltage fault response r/w bit 80h disable, no retry 57h vin_ov_warn_limit sets the v in overvoltage warning threshold r/w l11 d360h 13.5v 58h vin_uv_warn_limit sets the v in undervoltage warning threshold r/w l11 n/a 1.03 x vin_uv_fault_limit pin-strap setting 59h vin_uv_fault_limit sets the v in undervoltage fault threshold r/w l11 n/a pin-strap setting 5ah vin_uv_fault_response sets the v in undervoltage fault response r/w bit 80h disable, no retry 5eh power_good_on sets the voltage threshold for power-good indication. must be set higher than vout_uv_fault_limit r/w l16u n/a 0.9 x vout_command pin-strap setting 60h ton_delay sets the delay time from enable to v out rise r/w l11 ca80h 5ms 61h ton_rise sets the rise time of v out after enable and ton_delay r/w l11 ca80h 5ms 64h toff_delay sets the delay time from disable to start of v out fall r/w l11 0000h 0ms (immediate off) 65h toff_fall sets the fall time for v out after disable and toff_delay r/w l11 ca80h 5ms 78h status_byte summary of most critical faults read bit 00h no faults 79h status_word summary of critical faults read bit 0000h no faults 7ah status_vout reports v out warnings/faults read bit 00h no faults 7bh status_iout reports i out warnings/faults read bit 00h no faults 7ch status_input reports input warnings/faults read bit 00h no faults 7dh status_temp reports temperature warnings/faults read bit 00h no faults 7eh status_cml reports communication, memory, and logic errors read bit 00h no errors 80h status_mfr_specific reports voltage monitoring/clock synchronization faults read bit 00h no faults 88h read_vin reports input voltage measurement read l11 n/a n/a 89h read_iin reports input current measurement read l11 n/a n/a 8bh read_vout reports output voltage measurement read l16u n/a n/a 8ch read_iout reports output current measurement read l11 n/a n/a 8dh read_temperature_1 reports internal temperature measurement read l11 n/a n/a 8eh read_temperature_2 reports external temperature measurement read l11 n/a n/a 94h read_duty_cycle reports actual duty cycle read l11 n/a n/a 95h read_frequency reports actual switching frequency read l11 n/a n/a 99h mfr_id sets a user defined identification r/w asc n/a 9ah mfr_model sets a user defined model r/w asc n/a 9bh mfr_revision sets a user defined revision r/w asc n/a 9ch mfr_location sets a user defined location identifier r/w asc n/a 9dh mfr_date sets a user defined date r/w asc n/a 9eh mfr_serial sets a user defined serialized identifier r/w asc n/a pmbus command summary (continued) code command name description type data format default value default setting
zl8800 fn7558 rev.6.00 page 27 of 88 nov 8, 2017 adh ic_device_id reports device identificati on information read cus 49a02400h intersil, zl8800 aeh ic_device_rev reports device revision information read cus 00000000h initial release b0h user_data_00 sets a user defined data r/w asc n/a bfh deadtime_max sets the max dead time value for the adaptive dead time r/w bit 3838h 56ns, 56ns d0h isense_config configures curr ent sensing circuitry r/w bit 4204h downslope, 5 fault count, 256ns blanking, low range d1h user_config configures severa l user-level features r/w bit 0402h enable xtemp0, 1, pg open-drain, drmos enabled d2h iin_cal_gain sets the resistance of the input current sensing resistor r/w l11 c200h 2m d3h ddc_config configures the ddc addressing and current sharing r/w bit n/a set by pin-strapped pmbus address d4h power_good_delay sets the delay between pg threshold and pg assertion r/w l11 ba00h 1ms d6h inductor sets the inductor value r/w l11 b23d 0.56h d7h vout_margin_ratio % margin_high, low above/below vout_command r/w l11 ca80h 5% d8h ovuv_config configures output voltage ov/uv fault detection r/w bit 00h low-side fet off on fault, 1 violation triggers fault d9h xtemp_scale calibrates external temperature sensor r/w l11 ba00h 1/c dah xtemp_offset offset calibration for external temperature sensor r/w l11 0000h no offset dch tempco_config sets tempco settings r/w bit 27h 3900ppm/c ddh deadtime sets default dead time settings r/w l8s 1010h 16ns/16ns deh deadtime_config configures the adaptive dead time optimization mode r/w bit 0808h adaptive dead time enabled, 8ns/8ns dfh ascr_config configures the ascr settings r/w bit 015a0100h gain = 256, residual = 90 e0h sequence ddc rail sequencing configur ation r/w bit 00h prequel and sequel disabled e1h track_config configures voltage trac king modes r/w bit 00h tracking disabled e2h ddc_group configures group id, fault spreading, operation and v out r/w bit 000000h ignore broadcast, sequenced shutdown e4h device_id returns the device identifier string read asc n/a zl8800, current revisions e5h mfr_iout_oc_fault_response configures the i out overcurrent fault response r/w bit 80h disable, no retry e6h mfr_iout_uc_fault_response configures the i out undercurrent fault response r/w bit 80h disable, no retry e7h iout_avg_oc_fault_limit sets the i out average overcurrent fault threshold r/w l11 da00h 16a e8h iout_avg_uc_fault_limit sets the i out average undercurrent fault threshold r/w l11 de00h -16a e9h user_global_config sets options pertaining to advanced features r/w bit 0000h numerous device settings eah snapshot 32-byte read back of parametric and status values read bit n/a pmbus command summary (continued) code command name description type data format default value default setting
zl8800 fn7558 rev.6.00 page 28 of 88 nov 8, 2017 pmbus data formats linear-11 (l11) the l11 data format uses 5-bit two?s complement exponent (n) an d 11-bit two?s complement mantissa (y) to represent a real world decimal value (x). the relation between a real world decimal value (x), n, and y is: x = y2 n linear-16 unsigned (l16u) the l16u data format uses a fixed exponent (hard-coded to n = -1 3h) and a 16-bit unsigned intege r mantissa (y) to represent a r eal world decimal value (x). the relation between a real world decimal value (x), n, and y is: x = y2 -13 linear-16 signed (l16s) the l16s data format uses a fixed exponent (hard-coded to n = - 13h) and a 16-bit two?s complement mantissa (y) to represent a r eal world decimal value (x). the relation between a real world decimal value (x), n, and y is: x = y2 -13 bit field (bit) an explanation of the bit fi eld format is provided in ? pmbus command detail ? on page 29 . custom (cus) an explanation of the custom data format is provided in ? pmbus command detail ? on page 29 . a combination of bit field and integer are common type of custom data format. ascii (asc) a variable length string of text ch aracters in the ascii data format. ebh blank_params indicates recently saved parameter values read bit fff...fffh f0h legacy_fault_group configures fault group compatibility with older intersil digi tal power devices r/w bit 00000000h f3h snapshot_control snapshot feature control command r/w bit n/a n/a f4h restore_factory restores device to the hard-coded default values write n/a n/a n/a f5h mfr_vmon_ov_fault_limit sets the vmon overvoltage fault threshold r/w l11 d300h 12v f6h mfr_vmon_uv_fault_limit sets the vmon undervoltage fault threshold r/w l11 ca40h 4.5v f7h mfr_read_vmon reads the vmon voltage read l11 n/a n/a f8h vmon_ov_fault_response configures the vmon overvoltage fault response r/w bit 80h disable, no retry f9h vmon_uv_fault_response configures the vmon undervoltage fault response r/w bit 80h disable, no retry fah security_level reports the security level read hex 01h public security level fbh private_password sets the private password string r/w asc 00?00h fch public_password sets the public password string r/w asc 00?00h fdh unprotect identifies which commands are protected r/w custom ff?ffh n/a pmbus command summary (continued) code command name description type data format default value default setting 76543210 76543210 data ? byte ? high data ? byte ? low exponent ? (n) mantissa ? (y)
zl8800 fn7558 rev.6.00 page 29 of 88 nov 8, 2017 pmbus command detail page (00h) definition: selects controller 0, controller 1, or both controller 0 and controller 1 to rece ive commands. all commands following this command will be received and acted on by the selected controller or controllers. data length in bytes: 1 data format: bit field type: r/w protectable: no default value: 00h (page 0) units: n/a command page (00h) format bit field bit position 76543210 access r/w r/w r/w r/w r/w r/w r/w r/w function see following table default value 00000000 bits 7:4 bits 3:0 page 0000 0000 0 0000 0001 1 1111 1111 both
zl8800 fn7558 rev.6.00 page 30 of 88 nov 8, 2017 operation (01h) definition: sets enable, disable, and v out margin settings. data values of operation that force margin high or low only take effect when the mgn pin is left open (that is, in the nominal margin st ate). this command can also be monitored to read the operating state of the device on bits 7:6. paged or global: paged data length in bytes: 1 data format: bit field type: r/w protectable: yes default value: 00h (immediate off) units: n/a command operation (01h) format bit field bit position 76543210 access r/wr/wr/wr/wr/wr/wr/wr/w function see following table default value 00000000 bits 7:6 bits 5:4 bits 3:0 (not used) unit on or off margin state 00 00 0000 immediate off (no sequencing) n/a 01 00 0000 soft off (with sequencing) n/a 10 00 0000 on nominal 10 01 0000 on margin low 10 10 0000 on margin high note: bit combinations not listed above may cause command errors.
zl8800 fn7558 rev.6.00 page 31 of 88 nov 8, 2017 on_off_config (02h) definition: configures the interpretation and coordination of the operation command and the enable pin (en). paged or global: paged data length in bytes: 1 data format: bit field type: r/w protectable: yes default value: 17h (enable pin control, active high, turn off output immediately ? no ramp down) units: n/a clear_faults (03h) definition: clears all fault bits in all registers an d releases the salrt pin (if asserted) simu ltaneously. if a fault condition still exi sts, the bit will reassert immediately. this command will not restart a device if it has shut down, it will only clear the faults. paged or global: global data length in bytes: 0 byte data format: n/a type: write only protectable: yes default value: n/a units: n/a store_default_all (11h) definition: stores all current pmbus values from the operating memory into the nonvolatile default store memory. to clear the default store, perform a restore_factory then store_default_all. to add to the default store, perform a restore_default_all, write commands to be added, then store_default_all. this co mmand should not be used during device operation. the device will be unresponsive for 20ms while storing values. paged or global: global data length in bytes: 0 data format: n/a type: write only default value: n/a units: n/a command on_off_config (02h) format bit field bit position 76543210 access r/wr/wr/wr/wr/wr/wr/wr/w function see following table default value 00010111 bit number purpose bit value meaning 7:5 not used 000 not used. 4:2 sets the default to ei ther operate any time power is present or for the on/off to be controlled by enable pin, operation command, or when both the enable pin and operation command are valid. 000 device starts any time power is pr esent regardless of enable pin or operation command states. 101 device starts from the enable pin only. 110 device starts from the operation command only. 111 device starts when the enable pin is active and operation ?on? command has been sent. 1 polarity of the enable pin 0 active low (pull pin low to start the device) 1 active high (pull pin high to start the device) 0 enable pin action when commanding the unit to turn off 0 use the programmed ramp down settings 1 turn off the output immediately
zl8800 fn7558 rev.6.00 page 32 of 88 nov 8, 2017 restore_default_all (12h) definition: restores pmbus settings from the nonvolatile default store me mory into the operating memory. these settings are loaded at power-up if not superseded by settings in user store. security level is changed to level 1 following this command. this comm and should not be used during device operation. the devi ce will be unresponsive for 20ms while storing values. paged or global: global data length in bytes: 0 data format: n/a type: write only default value: n/a units: n/a store_user_all (15h) definition: stores all pmbus settings from the operat ing memory to the nonvolatile user st ore memory. to clear the user store, perform a restore_factory then store_user_all. to add to the user store, perform a restore_user_all, write commands to be added, then store_user_all. this comman d should not be used during device operation. the device will be unresponsive for 20ms while storing values. paged or global: global data length in bytes: 0 data format: n/a type: write only default value: n/a units: n/a restore_user_all (16h) definition: restores all pmbus settings from the user store memory to the operating me mory. command performed at power-up. security level is changed to level 1 following this command. this command should not be used during device operation. the devic e will be unresponsive for 20ms while storing values. paged or global: global data length in bytes: 0 data format: n/a type: write only default value: n/a units: n/a vout_mode (20h) definition: reports the v out mode and provides the exponent used in calculating several v out settings. paged or global: global data length in bytes: 1 data format: bit type: read only default value: 13h (linear mode, exponent = -13) units: n/a command vout_mode (20h) format bit field bit position 76543210 access rrrrrrrr function see following table default value 00010011 mode bits 7:5 bits 4:0 (parameter) linear 000 five-bit, two?s complement exponent for the mantissa delivered as the data bytes for an output voltage related command.
zl8800 fn7558 rev.6.00 page 33 of 88 nov 8, 2017 vout_command (21h) definition: sets or reports the target output voltage. the integer value is multiplied by 2 raised to the power of -13h. this command cannot be set to be higher than the lowest setting of either vout_max or 110% of the pin-strap v out setting. paged or global: paged data length in bytes: 2 data format: linear -16 unsigned type: r/w protectable: yes default value: pin-strap setting units: volts equation: v out = vout_command 2 -13 range : 0 to vout_max example : vout_command = 699ah = 27,034 target voltage equals 27034 2 -13 = 3.3v vout_cal_offset (23h) definition: applies a fixed offset voltage to the output voltage command value. this command is typically used to calibrate a device in the application circuit. the two bytes are fo rmatted as a two?s complement binary mant issa, used in conjunction with the expone nt of -13h. paged or global: paged data length in bytes: 2 data format: linear -16 signed type: r/w protectable: yes default value: 0000h units: volts equation: v out cal offset = vout_cal_offset2 -13 range : 3.99v command vout_command (21h) format linear, unsigned binary bit position 1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w default value pin-strap setting command vout_cal_offset (23h) format linear-16 signed bit position1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w default value0000000000000000
zl8800 fn7558 rev.6.00 page 34 of 88 nov 8, 2017 vout_max (24h) definition: sets an upper limit on the output voltage the unit can comm and regardless of any other commands or combinations. this command provides a safeguard against a user accidentally settin g the output voltage to a possibl y destructive level rather than to be the primary output overprotection. if a vout_command is sent with a value higher than vout_max, the device will set the output voltage to vout_max. paged or global: paged data length in bytes: 2 data format: linear -16 unsigned type: r/w protectable: yes default value: 1.10 x vout_command pin-strap setting units: volts equation: v out max = vout_max 2 -13 range : 0v to 5.5v vout_margin_high (25h) definition: sets the value of the v out during a margin high. this vout_margin_high command loads the unit with the voltage to which the output is to be changed when the operation command is set to ?margin high?. paged or global: paged data length in bytes: 2 data format: linear-16 unsigned type: r/w word protectable: yes default value: 1.05 x vout_command setting units: v equation: v out margin high = vout_margin_high x 2 -13 range : 0v to vout_max command vout_max (24h) format linear, unsigned binary bit position 1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w default value 1.10 x vout_command pin-strap setting command vout_margin_high (25h) format linear-16 unsigned bit position 1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w default value 1.05 x vout_command
zl8800 fn7558 rev.6.00 page 35 of 88 nov 8, 2017 vout_margin_low (26h) definition: sets the value of the v out during a margin low. this vout_margin_low co mmand loads the unit with the voltage to which the output is to be changed when the op eration command is set to ?margin low?. paged or global: paged data length in bytes: 2 data format: linear-16 unsigned type: r/w protectable: yes default value: 0.95 x vout_command pin-strap setting units: v equation: v out margin low = vout_margin_low range : 0v to vout_max vout_transition_rate (27h) definition: sets the rate at which the output should change voltage wh en the device receives an op eration command (margin high, margin low) that causes the output voltage to change. the maxi mum possible positive value of the two data bytes indicates that the device should make the transition as quickl y as possible. this commanded rate does no t apply when the device is commanded to tu rn on or to turn off. paged or global: paged data length in bytes: 2 data format: linear-11 type : r/w protectable: yes default value: ba00h (1.0v/ms) units: v/ms equation: vout_transition_rate = y2 n range : 0.1 to 4v/ms command vout_margin_low (26h) format linear, two?s complement binary bit position 1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w default value 0.95 x vout_command command vout_transition_rate (27h) format linear data format bit position 1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function signed exponent, n signed mantissa, y default value 1011101000000000
zl8800 fn7558 rev.6.00 page 36 of 88 nov 8, 2017 vout_droop (28h) definition: sets the effective load line (v/i slope) for the rail in which the device is used. it is the ra te, in mv/a, at which the output voltage decreases with increasing output current. for devices th at are set to sink output curr ent (negative output current), th e output voltage continues to increase as the output current is negative . vout_droop is not needed for 2-phase operation with a single zl8800. paged or global: paged data length in bytes: 2 data format: linear-11 type: r/w protectable: yes default value: 0000h (0mv/a) units: mv/a equation: vout_droop = y2 n range : 0 to 40mv/a frequency_switch (33h) definition: sets the switching frequency of the device . initial default value is defined by a pin-strap and this value can be overridden by writing this command. if an external sync is used, this value should be set as close as possible to the external clock value. t he output must be disabled when writing this command. av ailable frequencies are defined by the equation f sw = 16mhz/n where 11 n 80 paged or global: global data length in bytes: 2 data format: linear-11 type : r/w protectable: yes default value: pin-strap setting units: khz equation: frequency_switch = y2 n range : 200khz to 1.33mhz command vout_droop (28h) format linear-11 bit position1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function signed exponent, n signed mantissa, y default value0000000000000000 command frequency_switch (33h) format linear-11 bit position 1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function signed exponent, n signed mantissa, y default value pin-strapped value
zl8800 fn7558 rev.6.00 page 37 of 88 nov 8, 2017 interleave (37h) definition: configures the phase offset of a device that is sharing a common sync clock with other devices. an interleave group number and desired phase position are specified. interleave is used for setting the phase offset in noncurrent sharing devices. for current sharing rails, interleave is ignore d and ddc_config is used to configure the phase relationship between current sharing phases. paged or global: paged data length in bytes: 2 data format: bit field type : r/w protectable: yes default value: set by pin-strapped pmbus address, page 1 is automatically offset from page 0 units: n/a iout_cal_gain (38h) definition: sets the effective impedance across the current-sense circuit to calculate output current at +25c. paged or global: paged data length in bytes: 2 data format: linear-11 type : r/w protectable: yes default value: aa66h (0.3m ) units: m equation: iout_cal_gain = y2 n command interleave (37h) format bit field bit position 1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function see following table default value 00000000four lsbs of smbus addressfour lsbs of smbus address bits purpose value description 15:8 not used 0 not used. 7:4 group number 0 to 15 sets the group number. a value of 0 is interpreted as 16. 3:0 position of device 0 to 15 sets position of the device?s rail within th e group. a value of 0 is interpreted as 16. position 1 will have a 22.5 offset. command iout_cal_gain (38h) format linear-11 bit position1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function signed exponent, n signed mantissa, y default value1010101001100110
zl8800 fn7558 rev.6.00 page 38 of 88 nov 8, 2017 iout_cal_offset (39h) definition: nulls out any offsets in the output current-sensing circuit, and compensates for delayed measurements of current ramp due to isense blanking time. paged or global: paged data length in bytes: 2 data format: linear-11 type : r/w protectable: yes default value: 0000h (0a) units: a equation: iout_cal_offset = y2 n vout_ov_fault_limit (40h) definition: sets the v out overvoltage fault threshold. paged or global: paged data length in bytes: 2 data format: linear-16 unsigned type : r/w protectable: yes default value: 1.15 x vout_command pin-strap setting units: v equation: vout ov fault limit = vout_ov_fault_limit2 -13 range : 0v to 7.99v command iout_cal_offset (39h) format linear-11 bit position1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function signed exponent, n signed mantissa, y default value0000000000000000 command vout_ov_fault_limit (40h) format linear-16 unsigned bit position 1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w default value 1.15 x vout_command
zl8800 fn7558 rev.6.00 page 39 of 88 nov 8, 2017 vout_ov_fault_response (41h) definition: configures the v out overvoltage fault response. note that the device canno t be set to ignore this fault mode. the retry time is the time between restart attempts. paged or global: paged data length in bytes: 1 data format: bit field type : r/w protectable: yes default value: 80h (shut down immediately, no retries) units: retry time = 70ms vout_uv_fault_limit (44h) definition: sets the v out undervoltage fault threshold. this fault is masked du ring ramp, before power-good is asserted, or when the device is disabled. vout_uv_fault_limit must be set to a value below power_good_on. paged or global: paged data length in bytes: 2 data format: linear-16 unsigned type : r/w protectable: yes default value: 0.85 x vout_command pin-strap setting units: v equation: vout uv fault limit = vout_uv_fault_limit2 -13 range : 0v to 7.99v command vout_ov_fault_response (41h) format bit field bit position 76543210 access r/wr/wr/wr/wr/wr/wr/wr/w function see following table default value 10000000 bit field name value description 7:6 response behavior?the device: ?pulls salrt low ? sets the related fault bit in the status registers. fault bits are only cleared by the clear_faults command. 00-01 not used. 10 disable and retry according to the setting in bits [5:3]. 11 output is disabled while the fault is present. operation resumes and the output is enabled when the fault condition no longer exists. 5:3 retry setting 000 no retry. the output remains disabled until the device is restarted. 001-110 not used. 111 attempts to restart continuously, without checking if the fault is still present, until it is commanded off (by the control pin or operation command or both), bias power is removed, or another fault conditio n causes the unit to shut down. 2:0 not used 000-111 not used. command vout_uv_fault_limit (44h) format linear-16 unsigned bit position 1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w default value 0.85 x vout_command
zl8800 fn7558 rev.6.00 page 40 of 88 nov 8, 2017 vout_uv_fault_response (45h) definition: configures the v out undervoltage fault response. note that vout uv fa ults can only occur after power-good (pg) has been asserted. under some circumstances, this wi ll cause the output to stay fixed below the power-good threshold indefinitely. if th is behavior is undesired, use setting 80h. the re try time is the time between restart attempts. paged or global: paged data length in bytes: 1 data format: bit field type : r/w protectable: yes default value: 80h (shut down immediately, no retries) units: retry time unit = 70ms iout_oc_fault_limit (46h) definition: sets the i out peak overcurrent fault threshold. this limit is applie d to current measurement samp les taken after the current sense blanking time has expired. a fault occurs after this limit is exceeded for the number of consecutive samples as defined i n isense_config. this feature shar es the oc fault bit operation (in status_iout) an d oc fault response with iout_avg_oc_fault_lim it. paged or global: paged data length in bytes: 2 data format: linear-11 type : r/w protectable: yes default value: da80h (20a) units: a equation: iout_oc_fault_limit = y2 n range : -100a to 100a command vout_uv_fault_response (45h) format bit field bit position 76543210 access r/wr/wr/wr/wr/wr/wr/wr/w function see following table default value 10000000 bit field name value description 7:6 response behavior?the device: ?pulls salrt low ? sets the related fault bit in the status registers. fault bits are only cleared by the clear_faults command. 00-01 not used. 10 disable and retry according to the setting in bits [5:3]. 11 not used. 5:3 retry setting 000 no retry. the output remains disabled until the fault is cleared. 001-110 not used. 111 attempts to restart continuously, without checking if the fault is still present, until it is commanded off (by the enable pin or operation command or both), bias power is removed, or another fault condition causes the unit to shut down. 2:0 not used 000-111 not used. command iout_oc_fault_limit (46h) format linear, two?s complement binary bit position 1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function signed exponent, n signed mantissa, y default value 1101101010000000
zl8800 fn7558 rev.6.00 page 41 of 88 nov 8, 2017 iout_uc_fault_limit (4bh) definition: sets the i out valley undercurrent fault threshold. this limit is applied to current meas urement samples taken after the current sense blanking time has expired. a fault occurs after this limit is exceeded for the number of consecutive sample as defined in isense_config. this feature shares the uc fault bit operation (in status _iout) and uc fault response with iout_avg_uc_fault_lim it. paged or global: paged data length in bytes: 2 data format: linear-11 type : r/w protectable: yes default value: -20a (dd80h) units: a equation: iout_oc_fault_limit = y2 n range : -100a to 100a ot_fault_limit (4fh) definition: sets the temperature at which the device should indicate an over-temperature fault. note that the temperature must drop below ot_warn_limit to clear this fault. paged or global: paged data length in bytes: 2 data format: linear-11 type : r/w protectable: yes default value: ebe8h (+125c) units: celsius equation: ot_fault_limit = y2 n range : 0 to +175 command iout_uc_fault_limit (4bh) format linear, two?s complement binary bit position 1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function signed exponent, n signed mantissa, y default value -1 x iout_oc_fault_limit command ot_fault_limit (4fh) format linear, two?s complement binary bit position 1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function signed exponent, n signed mantissa, y default value 1110101111101000
zl8800 fn7558 rev.6.00 page 42 of 88 nov 8, 2017 ot_fault_response (50h) definition: instructs the device what action to take in response to an ov er-temperature fault. the retry time is the time between restart attempts. paged or global: paged data length in bytes: 1 data format: bit field type : r/w protectable: yes default value: 80h (shut down immediately, no retries) units: retry time unit = 210ms ot_warn_limit (51h) definition: sets the temperature at which the device should indicate an over-temperature warning alarm. in response to the ot_warn_limit being exceeded, the device sets the temper ature bit in status_word, sets the ot_warning bit in status_temperature, and notifies the host. paged or global: paged data length in bytes: 2 data format: linear-11 type : r/w protectable: yes default value: eb70h (+110c) units: celsius equation: ot_warn_limit = y2 n range : 0 to 175 command ot_fault_response (50h) format bit field bit position 76543210 access r/wr/wr/wr/wr/wr/wr/wr/w function see following table default value 10000000 bit field name value description 7:6 response behavior?the device: ?pulls salrt low ? sets the related fault bit in the status registers. fault bits are only cleared by the clear_faults command. 00-01 not used. 10 disable and retry according to the setting in bits [5:3]. 11 output is disabled while the fault is present. operation resumes and the output is enabled when the fault condition no longer exists. 5:3 retry setting 000 no retry. the output rema ins disabled until the fault is cleared. 001-110 not used. 111 attempts to restart continuously, without checking if the fault is still present, until it is commanded off (by the control pin or operat ion command), bias power is removed, or another fault condition causes the unit to shut down. 2:0 not used 000-111 not used. command ot_warn_limit (51h) format linear, two?s complement binary bit position 1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function signed exponent, n signed mantissa, y default value 1110101101110000
zl8800 fn7558 rev.6.00 page 43 of 88 nov 8, 2017 ut_warn_limit (52h) definition: sets the temperature at which the device should indicate an under-temperature warning alarm. in response to the ut_warn_limit being exceeded, the device sets the temper ature bit in status_word, sets the ut_warning bit in status_temperature, and notifies the host. paged or global: paged data length in bytes: 2 data format: linear-11 type : r/w protectable: yes default value: dc40h (-30c) units: celsius equation: ut_warn_limit = y2 n range : -55 to +25 ut_fault_limit (53h) definition: sets the temperature, in degrees celsius, of the unit at which it should indicate an under-temperature fault. note that the temperature must rise above ut_w arn_limit to clear this fault. paged or global: paged data length in bytes: 2 data format: linear-11 type : r/w protectable: yes default value: e530h (-45c) units: celsius equation: ut_fault_limit = y2 n range : -55 to +25 command ut_warn_limit (52h) format linear, two?s complement binary bit position 1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function signed exponent, n signed mantissa, y default value 1101110001000000 command ut_fault_limit (53h) format linear, two?s complement binary bit position 1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function signed exponent, n signed mantissa, y default value 1110010100110000
zl8800 fn7558 rev.6.00 page 44 of 88 nov 8, 2017 ut_fault_response (54h) definition: configures the under-temperature fault response as defined by the table below. the retry time is the time between restart attempts. paged or global: paged data length in bytes: 1 data format: bit field type : r/w protectable: yes default value: 80h (shut down immediately, no retries) units: retry time unit = 210ms vin_ov_fault_limit (55h) definition: sets the v in overvoltage fault threshold. paged or global: global data length in bytes: 2 data format: linear-11. type : r/w protectable: yes default value: d380h (14v) units: v equation: vin_ov_fault_limit = y2 n range : 0 to 19v command ut_fault_response (54h) format bit field bit position 76543210 access r/wr/wr/wr/wr/wr/wr/wr/w function see following table default value 10000000 bit field name value description 7:6 response behavior?the device: ?pulls salrt low ? sets the related fault bit in the status registers. fault bits are only cleared by the clear_faults command. 00-01 not used. 10 disable and retry according to the setting in bits [5:3]. 11 output is disabled while the fault is present. operation resumes and the output is enabled when the fault condition no longer exists. 5:3 retry setting 000 no retry. the output remains disabled until the device is restarted. 001-110 not used. 111 attempts to restart continuously, without checking if the fault is still present, until it is commanded off (by the control pin or operat ion command), bias power is removed, or another fault condition causes the unit to shut down. 2:0 not used 000-111 not used. command vin_ov_fault_limit (55h) format linear, two?s complement binary bit position 1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function signed exponent, n signed mantissa, y default value 1101001110000000
zl8800 fn7558 rev.6.00 page 45 of 88 nov 8, 2017 vin_ov_fault_response (56h) definition: configures the v in overvoltage fault response as defined by the table below. the retry time is the time between restart attempts. paged or global: global data length in bytes: 1 data format: bit field type : r/w protectable: yes default value: 80h (immediate shutdown, no retry) units: retry time unit = 70ms vin_ov_warn_limit (57h) definition: sets the v in overvoltage warning threshold as defined by the table below. in response to the ov_warn_limit being exceeded, the device sets the none of the above and input bits in status_word, sets the vin_ov_warning bit in status_input, and notifies the host. paged or global: global data length in bytes: 2 data format: linear-11 type : r/w protectable: yes default value: d360h (13.5v) units: v equation: vin_ov_fault_limit = y2 n range : 0 to 19v command vin_ov_fault_response (56h) format bit field bit position 76543210 access r/wr/wr/wr/wr/wr/wr/wr/w function see following table default value 10000000 bit field name value description 7:6 response behavior?the device: ?pulls salrt low ? sets the related fault bit in the status registers. fault bits are only cleared by the clear_faults command. 00-01 not used. 10 disable and retry according to the setting in bits [5:3]. 11 output is disabled while the fault is present. operation resumes and the output is enabled when the fault condition no longer exists. 5:3 retry setting 000 no retry. the output remains disabled until the fault is cleared. 001-110 not used. 111 attempts to restart continuously, without checking if the fault is still present, until it is commanded off (by the control pin or operat ion command), bias power is removed, or another fault condition causes the unit to shut down. 2:0 not used 000-111 not used. command vin_ov_warn_limit (57h) format linear, two?s complement binary bit position 1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function signed exponent, n signed mantissa, y default value 1101001101100000
zl8800 fn7558 rev.6.00 page 46 of 88 nov 8, 2017 vin_uv_warn_limit (58h) definition: sets the v in undervoltage warning threshold. if a vin_uv_f ault occurs, the input voltage must rise above vin_uv_warn_limit to clear the fault, which provides hysteresis to the fault threshold. in response to the uv_warn_limit being exceeded, the device sets the none of the above and input bits in status_word, sets the vin_uv_warning bit in status_input, and notifies the host. paged or global: global data length in bytes: 2 data format: linear-11 type : r/w protectable: yes default value: 1.03 x vin_uv_fault_limit pin-strap setting units: v equation: vin_uv_warn_limit = y2 n range : 0 to 19v vin_uv_fault_limit (59h) definition: sets the v in undervoltage fault threshold. paged or global: global data length in bytes: 2 data format: linear-11 type : r/w protectable: yes default value: pin-strap setting units: v equation: vin_uv_fault_limit = y2 n range : 0 to 19v command vin_uv_warn_limit (58h) format linear, two?s complement binary bit position 1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function signed exponent, n signed mantissa, y default value 1.03 x vin_uv_fault_limit command vin_uv_fault_limit (59h) format linear, two?s complement binary bit position 1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function signed exponent, n signed mantissa, y default value pin-strapped value
zl8800 fn7558 rev.6.00 page 47 of 88 nov 8, 2017 vin_uv_fault_response (5ah) definition: configures the v in undervoltage fault response as defined by the tabl e below. the retry time is the time between restart attempts. paged or global: global data length in bytes: 1 data format: bit field type : r/w protectable: yes default value: 80h (immediate shutdown, no retries) units: retry time unit = 70ms power_good_on (5eh) definition: sets the voltage threshold for power-good indication. power-good asserts when the output voltage exceeds power_good_on and de-asserts when the outp ut voltage is less than vout_uv_fault_li mit. power_good_on must be set to a value above vout_uv_fault_limit. paged or global: paged data length in bytes: 2 data format: linear-16 unsigned. type : r/w protectable: yes default value: 0.9 x vout_command pin-strap setting units: v command vin_uv_fault_response (5ah) format bit field bit position 76543210 access r/wr/wr/wr/wr/wr/wr/wr/w function see following table default value 10000000 bit field name value description 7:6 response behavior?the device: ?pulls salrt low ? sets the related fault bit in the status registers. fault bits are only cleared by the clear_faults command. 00-01 not used. 10 disable and retry according to the setting in bits [5:3]. 11 output is disabled while the fault is present. operation resumes and the output is enabled when the fault condition no longer exists. 5:3 retry setting 000 no retry. the output remains disabled until the fault is cleared. 001-110 not used. 111 attempts to restart continuously, without checking if the fault is still present, until it is commanded off (by the control pin or operat ion command), bias power is removed, or another fault condition causes the unit to shut down. 2:0 not used 000-111 not used. command power_good_on (5eh) format linear, unsigned binary bit position 1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w default value 0.9 x vout_command
zl8800 fn7558 rev.6.00 page 48 of 88 nov 8, 2017 ton_delay (60h) definition: sets the delay time from when the device is enabled to the start of v out rise. paged or global: paged data length in bytes: 2 data format: linear-11 type : r/w protectable: yes default value: ca80h, 5ms units: ms equation: ton_delay = y2 n range : 0 to 5 seconds. the minimum delay time is 3ms. values below 3ms will result in a delay time of 3ms. ton_rise (61h) definition: sets the rise time of vout after enable and ton_delay. paged or global: paged data length in bytes: 2 data format: linear-11. type : r/w protectable: yes default value: ca80h, 5ms units: ms equation: ton_rise = y2 n range : 1 to 100ms. the minimum rise time is 1ms. values below 1ms will default to 1ms. short rise times ma y cause excessive input and output currents to flow, thus tri ggering overcurrent faults at start-up. command ton_delay (60h) format linear, two?s complement binary bit position 1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function signed exponent, n signed mantissa, y default value 1100101010000000 command ton_rise (61h) format linear, two?s complement binary bit position 1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function signed exponent, n signed mantissa, y default value 1100101010000000
zl8800 fn7558 rev.6.00 page 49 of 88 nov 8, 2017 toff_delay (64h) definition: sets the delay time from disable to start of vout fall. paged or global: paged data length in bytes: 2 data format: linear-11 type : r/w protectable: yes default value: 0000h, 0ms units: ms equation: ton_delay = y2 n range : 0 to 5 seconds. values less than 0.5ms will set th e device to immediate off (no toff_fall ramp down). toff_fall (65h) definition: sets the fall time for v out after disable and toff_delay. paged or global: paged data length in bytes: 2 data format: linear-11 type : r/w protectable: yes default value: 5ms (ca80h) units: ms equation: toff_fall = y2 n range : 0 to 100ms. although values can be set below 0.50ms, fall time accu racy cannot be guaranteed. in addition, short fall times may cause excessive negative output current to flow, thus triggering undercurre nt faults at shut-down. status_byte (78h) definition: returns two bytes of information with a summary of the unit?s fault condition. based on the information in these bytes, the host can get more information by reading th e appropriate status registers. the low byte of the status_word is the same register as the status_byte (78h) command. paged or global: paged data length in bytes: 2 data format: bit field type : read only protectable: no default value: 00h units: n/a command toff_delay (64h) format linear, two?s complement binary bit position 1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function signed exponent, n signed mantissa, y default value 0000000000000000 command toff_fall (65h) format linear, two?s complement binary bit position 1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function signed exponent, n signed mantissa, y default value 1 x ton_rise
zl8800 fn7558 rev.6.00 page 50 of 88 nov 8, 2017 status_word (79h) definition: returns two bytes of information with a summary of the unit?s fault condition. based on the information in these bytes, the host can get more information by reading th e appropriate status registers. the low byte of the status_word is the same register as the status_byte (78h) command. paged or global: paged data length in bytes: 2 data format: bit field type : read only protectable: no default value: 0000h units: n/a command status_word (79h) format bit field bit position 1514131211109876543210 access rrrrrrrrrrrrrrrr function see following table default value 0000000000000000 bit number status bit name meaning 15 vout an output voltage fault or warning has occurred. 14 iout an output current or output power fault or warning has occurred. 13 input an input voltage, input current, or input power fault or warning has occurred. 12 mfg_specific a manufacturer specific fault or warning has occurred. 11 power_good # the power_good signal is negated if present ( note 17 ). 10 not used not used. 9 other a bit in status_other is set. 8unknown a fault type not given in bits 15:1 of the status_word has been detected. 7busy a fault was declared because the device was busy and unable to respond. 6off this bit is asserted if the unit is not providing power to the output, regardless of the reason, including simply not being enabled. 5 vout_ov_fault an output overvoltage fault has occurred. 4 iout_oc_fault an output overcurrent fault has occurred. 3 vin_uv_fault an input undervoltage fault has occurred. 2 temperature a temperature fault or warning has occurred. 1 cml a communications, memory, or logic fault has occurred. 0 none of the above a fault or warning not listed in bits 7:1 has occurred. note: 17. if the power_good# bit is set, this indi cates that the power_good signal, if presen t, is signaling that the output power is not good.
zl8800 fn7558 rev.6.00 page 51 of 88 nov 8, 2017 status_vout (7ah) definition: returns one data byte with the status of the output voltage. paged or global: paged data length in bytes: 1 data format: bit field type : read only protectable: no default value: 00h units: n/a status_iout (7bh) definition: returns one data byte with the status of the output current. paged or global: paged data length in bytes: 1 data format: bit field type : read only protectable: no default value: 00h units: n/a command status_vout (7ah) format bit field bit position 76543210 access rrrrrrrr function see following table default value 00000000 bit number status bit name meaning 7 vout_ov_fault indicates an output overvoltage fault. 6 vout_ov_warning indicates an output overvoltage warning. 5 vout_uv_warning indicates an output undervoltage warning. 4 vout_uv_fault indicates an output undervoltage fault. 3:0 not used not used. command status_iout (7bh) format bit field bit position 7 6 5 4 3 2 1 0 access rrrrrrrr function see following table default value00000000 bit number status bit name meaning 7iout_oc_faultan output over current fault has occurred. 6 iout_oc_lv_fault an output overcurrent and low voltage fault has occurred. 5 iout_oc_warning an output ov ercurrent warning has occurred. 4 iout_uc_fault an output under current fault has occurred. 3:0 not used not used.
zl8800 fn7558 rev.6.00 page 52 of 88 nov 8, 2017 status_input (7ch) definition: returns input voltage and input current status information. paged or global: global data length in bytes: 1 data format: bit field type : read only protectable: no default value: 00h units: n/a status_temperature (7dh) definition: returns one byte of information with a summary of any temperature related faults or warnings. paged or global: paged data length in bytes: 1 data format: bit field type : read only protectable: no default value: 00h units: n/a command status_input (7ch) format bit field bit position 76543210 access rrrrrrrr function see following table default value 00000000 bit number status bit name meaning 7 vin_ov_fault an input overvoltage fault has occurred. 6 vin_ov_warning an input overvoltage warning has occurred. 5 vin_uv_warning an input undervoltage warning has occurred. 4 vin_uv_fault an input undervoltage fault has occurred. 3:0 not used not used. command status_temp (7dh) format bit field bit position 76543210 access rrrrrrrr function see following table default value 00000000 bit number status bit name meaning 7 ot_fault an over-temperature fault has occurred. 6 ot_warning an over-temperature warning has occurred. 5 ut_warning an under-temperature warning has occurred. 4 ut_fault an under-temperature fault has occurred. 3:0 not used not used.
zl8800 fn7558 rev.6.00 page 53 of 88 nov 8, 2017 status_cml (7eh) definition: returns one byte of information with a summary of any communications, logic, and/or memory errors. paged or global: global data length in bytes: 1 data format: bit field type : read only protectable: no default value: 00h units: n/a command status_cml (7eh) format bit field bit position 76543210 access rrrrrrrr function see following table default value 00000000 bit number meaning 7 invalid or unsupported pmbus command was received. 6 the pmbus command was sent with invalid or unsupported data. 5 a packet error was detected in the pmbus command. 4:2 not used. 1 a pmbus command tried to write to a read only or protec ted command, or a communication fault other than the ones listed in this table has occurred. 0not used.
zl8800 fn7558 rev.6.00 page 54 of 88 nov 8, 2017 status_mfr_specific (80h) definition: returns one byte of information providing the status of the device?s voltage monitoring and clock synchronization faults. note: the vmon ov/uv warnings are set at 10% of the vmon_xx_fault commands. paged or global: global data length in bytes: 1 data format: bit field type: read only protectable: no default value: 00h units: n/a read_vin (88h) definition: returns the input voltage reading. paged or global: global data length in bytes: 2 data format: linear-11 type: read only protectable: no default value: n/a units: v equation: read_vin = y2 n range : n/a command status_mfr_specific (80h) format bit field bit position 76543210 access rrrrrrrr function see following table default value 00000000 bit field name meaning 7:6 not used not used. 5 vmon uv warning the vmon voltage has dropped below the vmon uv warning limit which is automatically set to 10% above mfr_vmon_uv_fault_limit (1.1 * mfr_vmon_uv_fault_limit). 4 vmon ov warning the vmon voltage has risen above the vmon ov warning limit which is automatically set to 10% below mfr_vmon_ov_fault_limit (0.9 * mfr_vmon_uv_fault_limit). 3 external switching period fault loss of external clock synchronization has occurred. 2not usednot used. 1 vmon uv fault the vmon voltage has dropped below mfr_vmon_uv_fault_limit. 0 vmon ov fault the vmon voltage has risen above mfr_vmon_ov_fault_limit. command read_vin (88h) format linear-11 bit position1514131211109876543210 access rrrrrrrrrrrrrrrr function signed exponent, n signed mantissa, y default value n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a
zl8800 fn7558 rev.6.00 page 55 of 88 nov 8, 2017 read_iin (89h) definition: returns the input current reading. paged or global: global data length in bytes: 2 data format: linear-11 type: read only protectable: no default value: n/a units: a equation: read_iin = y2 n range : n/a read_vout (8bh) definition: returns the output voltage reading. paged or global: paged data length in bytes: 2 data format: linear-16 unsigned type: read only protectable: no default value: n/a equation: read_vout = read_vout 2 -13 units: v read_iout (8ch) definition: returns the output current reading. paged or global: paged data length in bytes: 2 data format: linear-11 type: read only protectable: no default value: n/a units: a equation: read_iout = y2 n range : n/a command read_iin (89h) format linear-11 bit position 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 access rrrrrrrrrrrrrrrr function signed exponent, n signed mantissa, y default value n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a command read_vout (8bh) format linear-16 unsigned bit position1514131211109876543210 access rrrrrrrrrrrrrrrr default value n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a command read_iout (8ch) format linear-11 bit position1514131211109876543210 access rrrrrrrrrrrrrrrr function signed exponent, n signed mantissa, y default value n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a
zl8800 fn7558 rev.6.00 page 56 of 88 nov 8, 2017 read_temperature_1 (8dh) definition: returns the temperature reading internal to the device. paged or global: global data length in bytes: 2 data format: linear-11 type: read only protectable: no default value: n/a units: ? c equation: read_temperature_1 = y2 n range : n/a read_temperature_2 (8eh) definition: returns the temperature reading from the external temperature device connected to xtemp. paged or global: paged data length in bytes: 2 data format: linear-11 type: read only protectable: no default value: n/a units: ? c equation: read_temperature_2 = y2 n range : n/a command read_internal_temp (8dh) format linear-11 bit position1514131211109876543210 access rrrrrrrrrrrrrrrr function signed exponent, n signed mantissa, y default value n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a command read_external_temp (8eh) format linear-11 bit position1514131211109876543210 access rrrrrrrrrrrrrrrr function signed exponent, n signed mantissa, y default value n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a
zl8800 fn7558 rev.6.00 page 57 of 88 nov 8, 2017 read_duty_cycle (94h) definition : reports the actual duty cycle of the converter during the enable state. paged or global: paged data length in bytes: 2 data format: linear-11 type: read only protectable: no default value: n/a units: % equation: read_duty_cycle = y2 n range : 0 to100% read_frequency (95h) definition : reports the actual switching frequency of the converter during the enable state. paged or global: global data length in bytes: 2 data format: linear-11 default value: n/a units: khz equation: read_frequency = y2 n range : n/a mfr_id (99h) definition: sets a user defined identification string not to exceed 32 bytes. the sum total of characters in mfr_id, mfr_model, mfr_revision, mfr_location, mfr_date, mfr_serial, and user_d ata_00 plus one byte per command cannot exceed 128 bytes. this limitation includes multiple writes of this command before a store command. to clear multiple writes, perform a restore, w rite this command, then perform a store/restore. paged or global: global data length in bytes: user defined data format: ascii. iso/iec 8859-1 type: block r/w protectable: yes default value: null units: n/a command read_duty_cycle (94h) format linear-11 bit position1514131211109876543210 access rrrrrrrrrrrrrrrr function signed exponent, n signed mantissa, y default value n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a command read_frequency (95h) format linear-11 bit position1514131211109876543210 access rrrrrrrrrrrrrrrr function signed exponent, n signed mantissa, y default value n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a
zl8800 fn7558 rev.6.00 page 58 of 88 nov 8, 2017 mfr_model (9ah) definition: sets a user defined model string not to exceed 32byte s. the sum total of characters in mfr_id, mfr_model, mfr_revision, mfr_location, mfr_date, mfr_serial, and user_dat a_00 plus one byte per command cannot exceed 128bytes. this limitation includes multiple writes of this command before a store command. to clear multiple writes, perform a restore, w rite this command, then perform a store/restore. paged or global: global data length in bytes: user defined data format: ascii. iso/iec 8859-1 type: block r/w protectable: yes default value: null units: n/a mfr_revision (9bh) definition: sets a user defined revision string not to exceed 32byt es. the sum total of characters in mfr_id, mfr_model, mfr_revision, mfr_location, mfr_date, mfr_serial, and user_dat a_00 plus one byte per command cannot exceed 128bytes. this limitation includes multiple writes of this command before a store command. to clear multiple writes, perform a restore, w rite this command, then perform a store/restore. paged or global: global data length in bytes: user defined data format: ascii. iso/iec 8859-1 type: block r/w protectable: yes default value: null units: n/a mfr_location (9ch) definition: sets a user defined location identifier string not to exceed 32bytes. the sum total of characters in mfr_id, mfr_model, mfr_revision, mfr_location, mfr_date, mfr_serial, and user_dat a_00 plus one byte per command cannot exceed 128bytes. this limitation includes multiple writes of this command before a store command. to clear multiple writes, perform a restore, w rite this command, then perform a store/restore. paged or global: global data length in bytes: user defined data format: ascii. iso/iec 8859-1 type: block r/w protectable: yes default value: null units: n/a mfr_date (9dh) definition: sets a user defined date string not to exceed 32bytes. the sum total of characters in mfr_id, mfr_model, mfr_revision, mfr_location, mfr_date, mfr_serial, and us er_data_00 plus one byte per command ca nnot exceed 128bytes . this limitation includes multiple writes of this command before a store command. to clear multiple writes, perform a restore, write this comman d, then perform a store/restore. paged or global: global data length in bytes: user defined data format: ascii. iso/iec 8859-1 type: block r/w protectable: yes default value: null units: n/a
zl8800 fn7558 rev.6.00 page 59 of 88 nov 8, 2017 mfr_serial (9eh) definition: sets a user defined serialized identifier string not to exce ed 32bytes. the sum total of characters in mfr_id, mfr_model, mfr_revision, mfr_location, mfr_date, mfr_serial, and user_dat a_00 plus one byte per command cannot exceed 128bytes. this limitation includes multiple writes of this command before a store command. to clear multiple writes, perform a restore, w rite this command, then perform a store/restore. paged or global: global data length in bytes: user defined data format: ascii. iso/iec 8859-1 type: block r/w protectable: yes default value: null units: n/a ic_device_id (adh) definition: reports device identification information. paged or global: global data length in bytes: 4 data format: cus type: block read protectable: no default value: 49a02400h units: n/a ic_device_rev (aeh) definition: reports device revision information. paged or global: global data length in bytes: 4 data format: cus type: block read protectable: no default value: 00000000h units: n/a command ic_device_id (adh) format block read byte position 3210 function mfr code id high byte id low byte reserved default value 49h a0h 24h 00h command ic_device_rev (aeh) format block read byte position 3210 function firmware major firmware minor factory configuration reserved default value 00h 00h 00h 00h
zl8800 fn7558 rev.6.00 page 60 of 88 nov 8, 2017 user_data_00 (b0h) definition: sets a user defined data string not to exceed 32bytes. the sum total of characters in mfr_id, mfr_model, mfr_revision, mfr_location, mfr_date, mfr_serial, and us er_data_00 plus one byte per command cannot exceed 128bytes this limitation includes multiple writes of this command before a store command. to clear multiple writes, perform a restore, write this comman d, then perform a store/restore. paged or global: global data length in bytes: user defined data format: ascii. iso/iec 8859-1 type: block r/w protectable: yes default value: null units: n/a deadtime_max (bfh) definition: sets the maximum dead time value for the pwmh and pwml outputs. this limit applies during frozen or adaptive dead time algorithm modes (see deadtime_config). paged or global: paged data length in bytes: 2 data format: bit field type: r/w protectable: yes default value: 3838h (56ns/56ns) units: ns range : 0 to 60ns reference: n/a command deadtime_max (bfh) format bit field/linear-7 unsigned bit position1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function see following table default value0011100000111000 bits purpose value description 15 not used 0 not used. 14:8 sets the maximum high to low dead time h limits the maximum allowed high to low dead time when using the adaptive dead time algorith m. dead time = hns (signed) 7 not used 0 not used. 6:0 sets the maximum low to high dead time l limits the maximum allowed low to high dead time when using the adaptive dead time algorithm. dead time = lns (signed)
zl8800 fn7558 rev.6.00 page 61 of 88 nov 8, 2017 isense_config (d0h) definition: configures current sense circuitry. paged or global: paged data length in bytes: 2 data format: bit field type: r/w word protectable: yes default value: 4204h (256ns, 5 counts, downslope, low range) units: n/a range : n/a command isense_config (d0h) format bit field bit position1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function see following table default value0100001000000100 bit field name value setting description 15:11 current-sense blanking time 00000 0 sets the blanking time current-sense blanking time in increments of 32ns 00001 32 00010 64 00011 96 00100 128 00101 160 00110 192 00111 224 01000 256 01001 288 01010 320 01011 352 01100 384 01101 416 01110 448 01111 480 10000 512 10001 544 10010 576 10011 608 10100 640 10101 672 10110 704 10111 736 11000 768 11001 800 11010 832
zl8800 fn7558 rev.6.00 page 62 of 88 nov 8, 2017 10:8 current-sense fault count 000 1 sets the number of consecutive overcurre nt (oc) or undercurrent (uc) events required for a fault. an event can occur once during each switching cycle. for example, if 5 is selected, an oc or uc event must occur for 5 consecutive switching cycles, resulting in a dela y of at least 5 switching periods. 001 3 010 5 011 7 100 9 101 11 110 13 111 15 7:4 not used 0000 not used not used 3:2 current-sense control 00 not used selection of current-sensing method (dcr based: vout referenced) 01 dcr (down slope) 10 dcr (up slope) 11 not used 1:0 current-sense range 00 low range low range 25mv, medium range 35mv, high range 50mv 01 medium range 10 high range 11 not used bit field name value setting description
zl8800 fn7558 rev.6.00 page 63 of 88 nov 8, 2017 user_config (d1h) definition: configures several user-level features. this command should be saved immediately after being written to the desired user or default store. this is recommended when written as an individual command or as part of a series of commands in a configuration file or script. paged or global: paged data length in bytes: 2 data format: bit field type: r/w protectable: yes default value: 0402h units: n/a command user_config (d1h) format bit field bit position1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function see following table default value0000010000000010 bit field name value setting description 15:11 minimum duty cycle 00000 0-31d sets the minimum duty-cycle to 2 x (value + 1)/512. must be enabled with bit 7 10 enable dr mos 0 disable 0 = pwml and pwmh are direct drive to mosfet driver 1 enable 1 = pwml is drmos enable, pwmh is drmos pwm input 9:8 not used 0 not used not used. 7 minimum duty cycle control 0 disable control for minimum duty cycle 1enable 6 not used 0 not used not used. 5 vset select 0 vset0 0 = uses only vset0 to set pin-strapped output voltage 1 vset1 1 = uses only vset1 to set pin-strapped output voltage 4 margin ratio enable 0 disable use vout_margin_ratio to progra m margin values when enabled 1enable 3 pwml disabled state 0 low when disabled pwml is low (off) when device is disabled (bit 3 set to 0), or high (on) when device is disabled (bit 3 set to 1) 1 high when disabled 2 power-good configuration 0 open drain 0 = pg is open-drain output 1 push-pull 1 = pg is push-pull output 1xtemp enable 0 disable enables external temperature sensor 1enable 0xtemp fault select 0 disable selects external temperature sensor to determine temperature faults 1enable
zl8800 fn7558 rev.6.00 page 64 of 88 nov 8, 2017 iin_cal_gain (d2h) definition: sets the effective impedance across the current sense circuit for use in calculating input current at +25c. paged or global: global data length in bytes: 2 data format: linear-11. type: r/w protectable: yes default value: c200h (2m ) units: m equation: iin_cal_gain = y2 n ddc_config (d3h) definition: configures ddc addressing and current sharing. to operate as a 2-phase controller, set both phases to the same rail id, set phases in rail to 2, then set each phase id sequentially as 0 and 1. the zl8800 will automatically equally offset the phases in the rail. phase spreading is done automatically as pa rt of the ddc_config command, the interl eave command only applies to non-current sharing rails. the zl8800 can operate as a 2-phase controller, curr ent sharing between its two internal phases, but does not su pport current sharing with othe r zl8800 devices or phases. note: the output must be connected to vsen0p an d vsen0n when operating as a 2-phase controller. paged or global: paged data length in bytes: 2 data format: bit field type: r/w protectable: yes default value: pmbus address pin-strap dependent. units: n/a command iin_cal_gain (d2h) format linear-11 bit position1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function signed exponent, n signed mantissa, y default value1100001000000000 command ddc_config (d3h) format bit field bit position1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function see following table default value000 lower 5 bits of device address 00000000 bit field name value setting description 15:13 phase id 0 to 7 0 sets the output 's phase position within the rail 12:8 rail id 0 to 31d 0 identifies the device as part of a current sharing rail (shared output) 7:3 not used 00 00 not used. 2:0 phases in rail 0 to 7 0 identifies the nu mber of phases on the same rail (+1)
zl8800 fn7558 rev.6.00 page 65 of 88 nov 8, 2017 power_good_delay (d4h) definition: sets the delay applied between the output exceeding the pg threshold (power_good_on) an d asserting the pg pin. the delay time can range from 0ms up to 500s, in steps of 125ns. a 1ms minimum configured value is recommended to apply proper debounce to this signal. paged or global: paged data length in bytes: 2 data format : linear-11 type: r/w protectable : yes default value: ba00h, 1ms units: ms equation: power_good_delay = y2 n range: 0 to 5 seconds inductor (d6h) definition: informs the device of the circuit?s inductor value. this is used in adaptive algorithm calculat ions relating to the inductor ripple current. paged or global: paged data length in bytes: 2 data format: linear-11. type : r/w protectable: yes default value: b23dh (0.56h) units: h equation: inductor = y2 n range: 0 to 100h command power_good_delay (d4h) format linear-11 bit position1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function signed exponent, n signed mantissa, y default value1011101000000000 command inductor (d6h) format linear-11 bit position1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function signed exponent, n signed mantissa, y default value1011001000111101
zl8800 fn7558 rev.6.00 page 66 of 88 nov 8, 2017 vout_margin ratio (d7h) definition: percentage to set margin_high and margin_low above an d below vout_command when the feature is enabled by user_config. paged or global: paged data length in bytes: 2 data format: linear-11 type: r/w protectable: yes default value: 5 (ca80h) units: % equation: vout_margin_ratio = y2 n range : 0 to 50% ovuv_config (d8h) definition: configures the output voltage ov and uv fault detection feature paged or global: paged data length in bytes: 1 data format: bit field type: r/w protectable : yes default value: 00h units: n/a command vout_margin_ratio (d7h) format linear-11 bit position1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function signed exponent, n signed mantissa, y default value1100101010000000 command ovuv_config (d8h) format bit field bit position76543210 access r/w r/w r/w r/w r/w r/w r/w r/w function see following table default value00000000 bits purpose value description 7 controls how an ov fault response shutdown sets the output driver state 0 an ov fault does not enable low-side power device 1 an ov fault enables the low-side power device 6:4 not used 0 not used. 3:0 defines the number of consecutive limit violations required to declare an ov or uv fault n n+1 consecutive ov or uv violations initiate a fault response
zl8800 fn7558 rev.6.00 page 67 of 88 nov 8, 2017 xtemp_scale (d9h) definition: sets a scalar value that is used for calibrating the external temperature. the constant is applied in the equation below to produce the read value of xtemp through the pmbus command read_external_temp. paged or global: paged data length in bytes: 2 data format: linear -11 type : r/w protectable: yes default value: ba00h (1.0) units: 1/c equation: range: 0.1 to 10 xtemp_offset (dah) definition: sets an offset value that is used for calibrating the external temperature. the constant is a pplied in the equation below to produce the read value of xtemp through the pmbus command read_external_temp. paged or global: paged data length in bytes: 2 data format: linear-11. type : r/w protectable: yes default value: 0000h (0) units: c equation: range: -100 to 100 command xtemp_scale (d9h) format linear-11 bit position1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function signed exponent, n signed mantissa, y default value1011101000000000 command xtemp_offset (dah) format linear-11 bit position1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function signed exponent, n signed mantissa, y default value0000000000000000 et xtemp_offs e xtemp_scal 1 mperature externalte rature_2 read_tempe ? ? ? ? ? ? ? ? ? ? ? et xtemp_offs e xtemp_scal 1 mperature externalte rature_2 read_tempe ? ? ? ? ? ? ? ? ? ? ?
zl8800 fn7558 rev.6.00 page 68 of 88 nov 8, 2017 tempco_config (dch) definition: configures the correction factor and temperature measuremen t source when performing temperature coefficient correction for current sense. tempco_config values are applied as ne gative correction to a positive temperature coefficient. paged or global: paged data length in bytes: 1 data format: bit field type : r/w protectable: yes default value: 27h (3900ppm/c) equation: to determine the hex value of the tempco correction factor (tc) for current scale of a power stage current sensing, first determine the temperature coefficient of resistance for the sensing element, . this is calculated with the equation : where: r = sensing element resistance at temperature ?t? r ref = sensing element resistance at reference temperature t ref = temperature coefficient of resistance for the sensing element material t = temperature measured by temper ature sensor, in degrees celsius t ref = reference temperature that is specified at for the sensing element material after is determined, convert the value in units of 100ppm/c. this va lue is then converted to a hex value with the following equatio n : typical values: copper = 3900ppm/ ? c (27h), silicon = 4800ppm/ ? c (30h) range : 0 to 6300ppm/ ? c command tempco_config (dch) format bit field bit position 76543210 access r/wr/wr/wr/wr/wr/wr/wr/w function see following table default value 00100111 bits purpose value description 7 selects the temp sensor source for tempco co rrection 0 selects the internal temperature sensor 1 selects the xtemp pin for temperature measurements (2n3904 junction). note that xtemp must be enabled in user_config, bit 1. 6:0 sets the tempco correction in units of 100ppm/ ? c for iout_cal_gain tc rsen (dcr) = iout_cal_gain x (1 + tc x (t-25)) where rsen = resistance of sense element () ref ref ref rr rt t ? ? ? ? 6 10 100 tc ? ? ?
zl8800 fn7558 rev.6.00 page 69 of 88 nov 8, 2017 deadtime (ddh) definition: sets the nonoverlap between pwm transitions using a 2-byte data field. the most significant byte controls the high-side to low-side dead time value as a single two? s-complement signed value in units of ns. the least-significant byte controls the low- side to high-side dead time value. positive values imply a non-overlap of the fet drive on-times. negative values imply an overlap of t he fet drive on-times. the device will operate at the dead time values wr itten to this command when adaptive dead time is disabled, be tween the minimum dead time specified in dead time_config and the maximum dead time sp ecified in deadtime_max. when switching from adaptive dead time mode to frozen mode (by writing to bit 15 of deadtime_config) the frozen dead time will be whatever the last dead time was before the device switches to frozen dead time mode. paged or global: paged data length in bytes: 2 data format: two 2?s complement bytes type: r/w protectable: yes default value: 1010h (16ns/16ns) units: ns range: -15ns to 60ns deadtime_config (deh) definition: configures the adaptive dead time optimization mode. also se ts the minimum dead time valu e for the adaptive dead time mode range. paged or global: paged data length in bytes: 2 data format: bit field type: r/w protectable: yes default value: 0808h (adaptive dead time cont rol, 8ns/8ns minimum dead time) units: n/a command deadtime (ddh) format linear-8 signed bit position1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function high to low-side dead time 8-bit two's complement si gned low to high-side dead time 8-bit two's complement signed default value0001000000010000 command deadtime_config (deh) format bit field/linear-7 unsigned bit position1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function see following table default value0000100000001000 bits purpose value description 15 sets the high to low transition dead time mode 0 adaptive high to low dead time control 1 freezes the high to low dead time 14:8 sets the minimum high to low dead time 0-126d limits the minimum allowed high to low dead time when using the adaptive dead time al gorithm (2ns resolution) 7 sets the low to high transition dead time mode 0 adaptive low to high dead time control 1 freezes the low to high dead time 6:0 sets the minimum low to high dead time 0-126d limits the minimum allowed low to high dead time when using the adaptive dead time al gorithm (2ns resolution)
zl8800 fn7558 rev.6.00 page 70 of 88 nov 8, 2017 ascr_config (dfh) definition: allows user configuration of ascr settings. ascr gain an d residual value are automatically set by the zl8800 based on input voltage and output voltage. ascr gain is analogous to bandwidth, ascr residual is analogous to damping. to improve load transient response performance, increase as cr gain. to lower transient response oversh oot, increase ascr residual. increasing a scr gain can result in increased pwm jitter and should be evaluated in the application circuit. excessive ascr gain can lead to exc essive output voltage ripple. increasing ascr residual to improve transi ent response damping can result in slower recovery times, but will not affect the peak output voltage deviation. typical ascr gain sett ings range from 100 to 1000, and ascr residual settings range f rom 10 to 90. paged or global: paged data length in bytes: 4 data format: bit field and nonsigned binary type: r/w protectable: yes default value: 015a0100h (gain = 256d, residual = 90d, ascr enabled) units: n/a command ascr_config (dfh) format bit field/linear-8 unsigned bit position 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 access r/wr/wr/wr/wr/wr/wr/wr/wr/wr/wr/wr/wr/wr/wr/wr/w function see following table default value0000000110100000 format linear-16 unsigned bit position1514131211109876543210 access r/wr/wr/wr/wr/wr/wr/wr/wr/wr/wr/wr/wr/wr/wr/wr/w function see following table default value0000000100000000 bits purpose value description 31:25 not used 0000000h not used 24 ascr enable 1 enable 0 disable 23:16 ascr residual setting 5ah ascr residual 15:0 ascr gain setting 0100h ascr gain
zl8800 fn7558 rev.6.00 page 71 of 88 nov 8, 2017 sequence (e0h) definition: identifies the rail ddc id of the prequel and sequel rails when performing multirail sequencing. the device will enable its output when its en or operation enable state, as defined by on _off_config, is set and the preque l device has issued a power-goo d event on the ddc bus. the device will disable its output (using the programmed delay values) when the sequel device has issued a power-down event on the ddc bus. the data field is a two-byte value. the most-significant byte co ntains the 5-bit rail ddc id of the prequel device. the least-s ignificant byte contains the 5-bit rail ddc id of the sequel device. the most significant bit of each byte contains the enable of the preq uel or sequel mode. this command overrides the corresponding sequence configuration set by the config pin settings. paged or global: paged data length in bytes: 2 data format: bit field type: r/w protectable: yes default value: 00h (prequel and sequel disabled) units: n/a command sequence (e0h) format bit field bit position1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function see following table default value0000000000000000 bit field name value s etting description 15 prequel enable 0 disable disable, no prequel preceding this rail 1 enable enable, prequel to this rail is defined by bits 12:8 14:13 not used 0 not used not used 12:8 prequel rail ddc id 0-31d ddc id set to the ddc id of the prequel rail 7 sequel enable 0 disable disable, no sequel following this rail 1 enable enable, sequel to this rail is defined by bits 4:0 6:5 not used 0 not used not used 4:0 sequel rail ddc id 0-31d ddc id set to the ddc id of the sequel rail
zl8800 fn7558 rev.6.00 page 72 of 88 nov 8, 2017 track_config (e1h) definition: configures the voltage tracking modes of the device. only one ch annel can be configured to trac k: channel 0, channel 1, or the output of a 2- phase application. paged or global: paged data length in bytes: 1 data format: bit field type: r/w protectable: yes default value: 00h units: n/a command track_config (e1h) format bit field bit position 76543210 access r/wr/wr/wr/wr/wr/wr/wr/w function see following table default value 00000000 bit field name value setting description 7 voltage tracking control 0 disable tracking is disabled 1 enable tracking is enabled 6:3 not used 0000 not used not used 2 tracking ratio control 0 100% output tracks at 100% ratio of vtrk input 1 50% output tracks at 50% ratio of vtrk input 1 tracking upper limit 0 target voltage output voltage is limited by target voltage 1 vtrk voltage output voltage is limited by vtrk voltage 0 ramp-up behavior 0 track after pg the output is no t allowed to track vtrk down before power-good 1 track always the output is allowed to track vtrk down before power-good
zl8800 fn7558 rev.6.00 page 73 of 88 nov 8, 2017 ddc_group (e2h) definition: rails (output voltages) are assigned group numbers in or der to share specified behaviors. the ddc_group command configures fault spreading group id and en able, broadcast operation grou p id and enable, and broadcast vout_command group id and enable. note that ddc groups are separa te and unique from ddc phases and interlea ve groups. current sharing rails need to b e in the same ddc group in order to respond to broadcast vout_c ommand and operation commands. po wer fail event responses (and phases) are automatically spread in phase 0 and 1 when the zl8800 is operating in 2-phase current sharing mode when it is configured using ddc_config, regardless of its setting in ddc_group. paged or global: paged data length in bytes: 3 data format: bit field type: r/w protectable: yes default value: 000000h (ignore broadcast vout_command and operat ion, sequence shutdown on power_fail event) units: n/a command ddc_group (e2h) format bit field bit position23222120191817161514131211109876543210 access r/ w r/ w r/ w r/ w r/ w r/ w r/ w r/ w r/ w r/ w r/ w r/ w r/ w r/ w r/ w r/ w r/ w r/ w r/ w r/ w r/ w r/ w r/ w r/ w function see following table default value 000 lower 5 bits of device address 000 lower 5 bits of device address 000 lower 5 bits of device address bits purpose value description 23:22 not used 00 not used 21 broadcast_vout_command response 1 responds to broadcast_vout_command with same group id 0 ignores broadcast_vout_command 20:16 broadcast_vout_command group id 0-31d group id sent as data for broadcast broadcast_vout_command events 15:14 not used 00 not used 13 broadcast_operation response 1 responds to broadcast_operation with same group id 0ignores broadcast_operation 12:8 broadcast_operation group id 0-31d group id sent as data for broadcast broadcast_operation events 7:6 not used 00 not used 5 power_fail response 1 responds to power_fail events with same group id by shutting down immediately 0 responds to power_fail events with same group id with sequenced shutdown 4:0 power_fail group id 0-31d group id sent as data for broadcast power_fail events
zl8800 fn7558 rev.6.00 page 74 of 88 nov 8, 2017 device_id (e4h) definition: returns the 16-byte (character) device identifier string. the fo rmat is: part number, major revi sion, (period), minor revision, engineering version letter. paged or global: global data length in bytes: 16 data format: ascii. iso/iec 8859-1 type: block read protectable: no default value: zl8800, current major revision, (period), current minor revision, current engineering version letter units: n/a mfr_iout_oc_fault_response (e5h) definition : configures the i out overcurrent fault response as defined by the follow ing table. the command format is the same as the pmbus standard fault responses exce pt that it sets the overcurrent status bit in status_iout. the retry time is the time betwee n restart attempts. paged or global: paged data length in bytes: 1 data format: bit field type: r/w protectable : yes default value: 80h (immediate shutdown, no retries) units: retry time = 70ms command device_id (e4h) format characters (bytes) characters1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function part number maj. rev. . min. rev engr. default valuezl8800 ****** * current revision at time of manufacture command mfr_iout_oc_fault_response (e5h) format bit field bit position76543210 access r/w r/w r/w r/w r/w r/w r/w r/w function see following table default value10000000 bit field name value description 7:6 response behavior?for all modes, the device: ? pulls salrt low ? sets the related fault bit in the status registers. fault bits are only cleared by the clear_faults command. 00 not used. 01 not used. 10 disable without delay and retry acco rding to the setting in bits 5:3. 11 not used. 5:3 retry setting 000 no retry. the output rema ins disabled until the fault is cleared. 001-110 not used. 111 attempts to restart continuously, without checking if the fault is still present, until it is commanded off (by the control pin or oper ation command or both), bias power is removed, or another fault condition causes the unit to shut down. 2:0 not used 000-111 not used.
zl8800 fn7558 rev.6.00 page 75 of 88 nov 8, 2017 mfr_iout_uc_fault_response (e6h) definition: configures the i out undercurrent fault response as defined by the follo wing table. the command format is the same as the pmbus standard fault responses except that it sets the undercurrent status bit in stat us_iout. the retry time is the time betwe en restart attempts. data length in bytes: 1 paged or global: paged data format: bit field type: r/w protectable: yes default value: 80h (immediate shutdown, no retries) units: retry time unit = 70ms command mfr_iout_uc_fault_response (e6h) format bit field bit position 76543210 access r/wr/wr/wr/wr/wr/wr/wr/w function see following table default value 10000000 bit field name value description 7:6 response behavior?for all modes, the device: ? pulls salrt low ? sets the related fault bit in the status registers. fault bits ar e only cleared by the clear_faults command. 00 not used. 01 not used. 10 disable without delay and retry according to the setting in bits 5:3. 11 not used. 5:3 retry setting 000 no retry. the output rema ins disabled until the fault is cleared. 001-110 not used. 111 attempts to restart continuously, without checki ng if the fault is still present, until it is commanded off (by the control pin or operation command or both), bias power is removed, or another fault cond ition causes the unit to shut down. 2:0 not used 000-111 not used.
zl8800 fn7558 rev.6.00 page 76 of 88 nov 8, 2017 iout_avg_oc_fault_limit (e7h) definition: sets the i out average overcurrent fault threshold. for downslope sensin g, this corresponds to the average of all the current samples taken during the (1-d) time interval, excluding the curren t sense blanking time (which oc curs at the beginning of the 1 -d interval). for up-slope sensing, this corresponds to the averag e of all the current samples take n during the d time interval, e xcluding the current sense blanking time (which occurs at the beginning of th e d interval). this feature shares the oc fault bit operation ( in status_iout) and oc fault response with iout_ oc_fault_limit. paged or global: paged data length in bytes: 2 data format: linear-11 type: r/w protectable : yes default value: 16a (da00h) units: amperes equation: iout_avg_oc_fault_limit = y2 n range : -100 to 100a iout_avg_uc_fault_limit (e8h) definition: sets the iout average undercurrent fault threshold. for downsl ope sensing, this corresponds to the average of all the current samples taken during the (1-d) time interval, excluding the curren t sense blanking time (which oc curs at the beginning of the 1 -d interval). for up-slope sensing, this corresponds to the averag e of all the current samples take n during the d time interval, e xcluding the current sense blanking time (which occurs at the beginning of th e d interval). this feature shar es the uc fault bit operation ( in status_iout) and uc fault respon se with iout_ uc_fault_limit. paged or global: paged data length in bytes: 2 data format: linear-11 type: r/w protectable: yes default value: -16a (de00h) units: amperes equation: iout_avg_uc_fault_limit = y2 n range : -100 to 100a command iout_avg_oc_fault_limit (e7h) format linear-11 bit position1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function signed exponent, n signed mantissa, y default value 0.8 x iout_oc_fault_limit command iout_avg_uc_fault_limit (e8h) format linear-11 bit position1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function signed exponent, n signed mantissa, y default value 0.8 x iout_uc_fault_limit
zl8800 fn7558 rev.6.00 page 77 of 88 nov 8, 2017 user_global_config (e9h) definition: sets options for the output voltage sensing, maximum output voltage override, smbus time-o ut, and ddc and sync output configurations. paged or global: global data length in bytes: 2 data format: bit field type: r/w protectable: yes default value: 0000h units: n/a command user_global_config (e9h) format bit field bit position1514131211109876543210 access r/wr/wr/wr/wr/wr/wr/wr/wr/wr/wr/wr/wr/wr/wr/wr/w function see following table default value0000000000000000 bits purpose value description 15:10 not used 000000 not used 9:8 vsense select for monitoring and fault detection 00 output 0 uses vsen0, output 1 uses vsen1 01 both outputs use vsen0 10 both outputs use vsen1 7 not used 0 not used 6 ddc output configuration 0 ddc output open-drain 1 ddc output push-pull 5 not used 0 not used 4 disable smbus time-outs 0 smbus time-outs enabled 1 smbus time-outs disabled 3 not used 0 not used 2:1 sync i/o control 00 use internal clock (f requency initially set with pin-strap) 01 use internal clock and output internal clock (not for use with pin-strap) 10 use external clock 11 not used 0 not used 0 not used
zl8800 fn7558 rev.6.00 page 78 of 88 nov 8, 2017 snapshot (eah) definition: a 32-byte read-back of parametric and status values. it allows mo nitoring and status data to be stored to flash either during a fault condition or through a system-defin ed time using the snapshot_control command. snapshot is continuously updated in ram and can be read using the snapshot comm and. when a fault occurs, the latest snapshot in ram is stored to flash. snapshot data can read back by writing a 01h to the snapshot_control command, then reading snapshot. paged or global: paged data length in bytes: 32 data format: bit field type: block read protectable: no default value: n/a units: n/a blank_params (ebh) definition: returns a 16-byte string which indicates which parameter values were either retrieved by the last restore operation or have been written since that time. reading blank_params immediately after a restore op eration allows the user to determine whic h parameters are stored in that store. a one indicates the parameter is not present in the store and has not been written since t he restore operation. paged or global: paged data length in bytes: 16 data format: bit field type: block read protectable: no default value: ff?ffh units: n/a byte number value pmbus command format 31:23 not used not used 0000h 22 flash memory status byte n/a bit field 21 manufacturer specific status byte stat us_mfr_specific (80h ) 1 byte bit field 20 cml status byte status_cml (7eh) 1 byte bit field 19 temperature status byte status_temperature (7dh) 1 byte bit field 18 input status byte status_input (7ch) 1 byte bit field 17 iout status byte status_iout (7bh) 1 byte bit field 16 vout status byte status_vout (7ah) 1 byte bit field 15:14 switching frequency read_fre quency (95h) 2 byte linear-11 13:12 external temperature read_temperature_2 (8eh) 2 byte linear-11 11:10 internal temperature read_temperature_1 (8dh) 2 byte linear-11 9:8 duty cycle read_duty_cycle (94h) 2 byte linear-11 7:6 highest measured output current n/a 2 byte linear-11 5:4 output current read_iout (8ch) 2 byte linear-11 3:2 output voltage read_vout (8bh) 2 byte linear-16 unsigned 1:0 input voltage read_vin (88h) 2 byte linear-11
zl8800 fn7558 rev.6.00 page 79 of 88 nov 8, 2017 legacy_fault_group (f0h) definition: allows the zl8800 to sequence and fault spread with devices other than the zl8800 family of ics. this command sets which rail ddc ids should be listened to for fault spreading information. the data sent is a 4-byte, 32-bit vector where every bit represents a rail?s ddc id. a bit set to 1 indicates a device ddc id to which the configured device will respond upon receiving a fault spreading event. in this vector, bit 0 of byte 0 corresponds to the rail with ddc id 0. following through, bit 7 of byte 3 corr esponds to the rail with ddc id 31. note: the device/rail?s own ddc id shou ld not be set within the legacy_fault_group command for that device/rail. all devices in a current share rail (devices other than the zl8800 family ics) must shut down for the rail to report a shutdown . if fault spread mode is enabled in user_config, the device will immediately shut down if one of its ddc_group members fail. the device/rail will attempt its configured restart only after all devices/rails within the ddc_group have cleared their faults. if fault spread mode is disabled in user_config, the device will perform a sequenced shutdown as defined by the sequence command setting. the rails/devices in a sequencing set only atte mpt their configured restart afte r all faults have cleared with in the ddc_group. if fault spread mode is disabled and sequencing is al so disabled, the device will ignore faults from other devices a nd stay enabled. paged or global: paged data length in bytes: 4 data format: bit field type: block r/w protectable: yes default value: 00000000h units: n/a command legacy_fault_group (f0h) format bit field bit position 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 access r/wr/wr/wr/wr/wr/wr/wr/wr/wr/wr/wr/wr/wr/wr/wr/w function see following table default value0000000000000000 format bit field bit position1514131211109876543210 access r/wr/wr/wr/wr/wr/wr/wr/wr/wr/wr/wr/wr/wr/wr/wr/w function see following table default value0000000000000000 bit field name value setting description 31:0 fault group na 00000000h identifies the de vices in the fault spreading group.
zl8800 fn7558 rev.6.00 page 80 of 88 nov 8, 2017 snapshot_control (f3h) definition: writing a 01h will cause the device to copy the current sn apshot values from nvram to the 32-byte snapshot command parameter. writing a 02h will cause the device to write the curren t snapshot values to nvram, 03h will erase all snapshot value s from nvram. write (02h) and erase (03h) can be used only when the device is disabled. all other values will be ignored. paged or global: global data length in bytes: 1 data format: bit field type: r/w byte protectable: yes default value: n/a units: n/a restore_factory (f4h) definition: restores the device to the hard-coded factory default values and pin-strap definitions. the device retains the default and user stores for restoring. security level is changed to level 1 following this command. paged or global: global data length in bytes: 0 data format: n/a type: write only protectable: yes default value: n/a units: n/a command snapshot_control (f3h) format bit field bit position 76543210 access r/w r/w r/w r/w r/w r/w r/w r/w function see following table default value00000000 value description 01 read snapshot values from nvram 02 write snapshot values to nvram 03 erase snapshot values from nv ram
zl8800 fn7558 rev.6.00 page 81 of 88 nov 8, 2017 mfr_vmon_ov_fault_limit (f5h) definition: sets the vmon overvoltage fault threshold. a vmon paramete r equals 16 times the voltage applied to the vmon pin. the vmon overvoltage warn limit is automatically set to 90% of this fault value. paged or global: global data length in bytes: 2 data format: linear-11 type: r/w protectable: yes default value: d300h (12v) units: v equation: mfr_vmon_ov_fault_limit = y2 n range : 0 to 19v mfr_vmon_uv_fault_limit (f6h) definition: sets the vmon undervoltage fault threshold. a vmon paramete r equals 16 times the voltage applied to the vmon pin. the vmon undervoltage warn limit is automati cally set to 110% of this fault value. paged or global: global data length in bytes: 2 data format: linear-11 type: r/w protectable: yes default value: ca40h (4.5v) units: v equation: mfr_vmon_uv_fault_limit = y x 2 n range : 0 to 19v command mfr_vmon_ov_fault_limit (f5h) format linear-11 bit position1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function signed exponent, n signed mantissa, y default value1101001100000000 command mfr_vmon_uv_fault_limit (f6h) format linear-11 bit position1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function signed exponent, n signed mantissa, y default value1100101001000000
zl8800 fn7558 rev.6.00 page 82 of 88 nov 8, 2017 mfr_read_vmon (f7h) definition: reads the vmon voltage. paged or global: global data length in bytes: 2 data format: linear-11 type: read only protectable: no default value: n/a units: v equation: mfr_read_vmon = y x 2 n range : 0 to 19v vmon_ov_fault_response (f8h) definition: configures the vmon overvoltage fault response as defined by th e following table. the retry time is the time between restart attempts. paged or global: global data length in bytes: 1 data format: bit field type: r/w protectable: yes default value: 80h (immediate shutdown, no retries) units: retry time unit = 70ms command mfr_read_vmon (f7h) format linear-11 bit position1514131211109876543210 access r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w function signed exponent, n signed mantissa, y default value n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a command vmon_ov_fault_response (f8h) format bit field bit position 76543210 access r/wr/wr/wr/wr/wr/wr/wr/w function see following table default value 10000000 bit field name value description 7:6 response behavior?the device: ? pulls salrt low ? sets the related fault bit in the status registers. fault bits are only cleared by the clear_faults command. 00 not used. 01 not used. 10 disable without delay and retry acco rding to the setting in bits 5:3. 11 output is disabled while the fault is present. operation resumes and the output is enabled when the fault condition no longer exists. 5:3 retry setting 000 no retry. the output rema ins disabled until the fault is cleared. 001-110 not used. 111 attempts to restart continuously, without checking if the fault is still present, until it is commanded off (by the control pin or oper ation command or both), bias power is removed, or another fault condition causes the unit to shut down. 2:0 not used 000-111 not used.
zl8800 fn7558 rev.6.00 page 83 of 88 nov 8, 2017 vmon_uv_fault_response (f9h) definition: configures the vmon undervoltage fault resp onse as defined by the following table. note: the retry time is the time between restart attempts. paged or global: global data length in bytes: 1 data format: bit field type: r/w protectable: yes default value: 80h (immediate shutdown, no retries) units: retry time unit = 70ms security_level (fah) definition: the device provides write protection for individual commands. each bit in the unprotect parameter controls whether its corresponding command is writeable (commands are always readable). if a command is not writeable, a password must be entered in order to change its parameter (that is, to enable writes to that command). passwords can be either public or private. the publi c password provides a simple lock-and-key protection against accide ntal changes to the device. it would typically be sent to the device in the application prior to making changes. private passwords allow commands marked as non-writeable in the unprotect parameter to be changed. private passwords are intended for protecting defaul t-installed configurations and would not typically be used in t he application. each store (user and default) can have its own unpr otect string and private password. if a command is marked as non-writeable in the default unprotect parameter (its correspondi ng bit is cleared), the private password in the default store must be sent in order to change that command. if a command is writeable according to the default unprotect parameter, it may still b e marked as non-writeable in the user store unprotect parameter. in this case, the user private password can be sent to make the command writeable. the device supports four levels of security. each level is designed to be used by a particular class of users, ranging from mod ule manufacturers to end users, as discussed in the following sectio ns. levels 0 and 1 correspond to the public password. all other levels require a private password. writing a private password can only raise the security level. writing a public password will reset the level down to 0 or 1. figure 13 shows the algorithm used by the device to dete rmine if a particular command write is allowed. command vmon_uv_fault_response (f9h) format bit field bit position 76543210 access r/wr/wr/wr/wr/wr/wr/wr/w function see following table default value 10000000 bit field name value description 7:6 response behavior?the device: ? pulls salrt low ? sets the related fault bit in the status registers. fault bits are only cleared by the clear_faults command. 00 not used. 01 not used. 10 disable without delay and retry acco rding to the setting in bits 5:3. 11 output is disabled while the fault is present. operation resumes and the output is enabled when the fault condition no longer exists. 5:3 retry setting 000 no retry. the output rema ins disabled until the fault is cleared. 001-110 not used. 111 attempts to restart continuously, without checking if the fault is still present, until it is commanded off (by the control pin or oper ation command or both), bias power is removed, or another fault condition causes the unit to shut down. 2:0 not used 000-111 not used.
zl8800 fn7558 rev.6.00 page 84 of 88 nov 8, 2017 security level 3 ? module vendor level 3 is intended primarily for use by module vendors to protec t device configurations in the default store. clearing an unpr otect bit in the default store implies that a command is writeable only at level 3 and above. the device?s security level is raised to le vel 3 by writing the private password value previously stored in the defaul t store. to be effective, the module vendor must clear the un protect bit corresponding to the store_default_all and restore_default commands. otherwise, level 3 protection is ineffective since the entire store could be replaced by the user, including the enclosed private password. security level 2 ? user level 2 is intended for use by the end user of the device. clearing an unprotect bit in the user store implies that a command i s writeable only at level 2 and above. the device?s security leve l is raised to level 2 by writing the private password value pre viously stored in the user store. to be effective, the user must clear the unprotect bit corresponding to the store_user_all, restore_default_all, store_default_all, and restore_default co mmands. otherwise, level 2 protection is ineffective since the entire store could be replaced, including the enclosed private password. security level 1 ? public level 1 is intended to protect against accidental changes to ordi nary commands by providing a gl obal write-enable. it can be us ed to protect the device from erroneous bus operations. it provides ac cess to commands whose unprotect bit is set in both the default and user store. security is raised to level 1 by writing the publ ic password stored in the user store using the public_password command. the public password stored in the default store has no effect. always writeable ? security level == 3 ? default unprotect == 0 ? security level == 2 ? user unprotect == 0 ? security level == 1 ? n n n n write allowed write prohibited y y y y write attempted read only ? n n y y y n figure 13. algorithm used to determine when a command is writeable
zl8800 fn7558 rev.6.00 page 85 of 88 nov 8, 2017 security level 0 - unprotected level 0 implies that only commands which are always writeable (suc h as public_password) are available. this represents the lowe st authority level and hence the most protected state of the device. the level can be reduced to 0 by using public_password to wri te any value which does not match the stored public password. paged or global: global data length in bytes: 1 data format: hex type: read byte protectable: no default value: 01h units: n/a reference: an2031 - ?writing configuration files for intersil digital power? private_password (fbh) definition: sets the private password string. paged or global: global data length in bytes: 9 data format: ascii. iso/iec 8859-1 type: block r/w protectable: no default value: 000000000000000000h units: n/a reference: an2031 - ?writing configuration files for intersil digital power? public_password (fch) definition : sets the public password string. paged or global: global data length in bytes: 4 data format: ascii. iso/iec 8859-1 type: block r/w protectable: no default value: 00000000h units: n/a reference: an2031 - ?writing configuration files for intersil digital power? unprotect (fdh) definition: sets a 256-bit (32-byte) parameter which identifies which co mmands are to be protected against write-access at lower security levels. each bit in this parameter corresponds to a co mmand according to the command?s code. the command with a code o f 00h (page) is protected by the least-significant bit of the leas t-significant byte, followed by the command with a code of 01h and so forth. note that all possible commands have a corresponding bit regardless of whether they are protectable or supported by the device. clearing a command?s unprotect bit indicates that write-access to that command is only allowed if the device?s security level h as been raised to an appropriate level. the unprotect bits in the default store require a security level 3 or greater to be writea ble. the unprotect bits in the user store require a security level of 2 or higher. data length in bytes: 32 paged or global: global data format: custom type: block r/w protectable: no default value: ff?ffh units: n/a reference: an2031 - ?writing configuration files for intersil digital power?
zl8800 fn7558 rev.6.00 page 86 of 88 nov 8, 2017 firmware revision history firmware revision code change description note 1.06 fix to start-up routine to improve sa pin read performance at cold temperatures. improved fault retry performance. improved ddc compatibility with previous generations of intersil controllers and modules. addition of the legacy_fault_group command to allow for fault spreading over intersil?s ddc bus with previous generation of controllers and modules. defaults for iout_xxx and toff_fall are fixed values; they are no longer dependent on other command values. some command defaults may differ from 1.04 values by one bit. toff_delay settings less than 0.5ms will set the device to immediate off shutdown behavior. interleave default automatically phase spread in 2 channel mode. ddc_config default automatically sets group number. recommended for new designs 1.04 initial release not recommended for new designs revision history the revision history provided is for in formational purposes only and is believ ed to be accurate, but not warranted. please visit our website to make sure you have the latest revision. date revision change nov 8, 2017 fn7558.6 added an explanation of the en0 and en1 timi ng restrictions to ?enable pin operation and timing? on page 15. updated to the current renesas format. aug 10, 2017 fn7558.5 in the features section, updated the voltage range to ?4.5v to 5.5v or 6.5v to 14v? updated application diagrams to show use of drmos devices. added a two phase schematic diagram with drmos. pin description section for the scl and sda pins, added ?requires a pull-up resist or to a 2.5v to 5.5v (recommend vr5, do not use v25) source. pull-up supply must be from an ?always on? source or vr5.? for the salrt pin, added ?requires a pull-up resistor to a 2.5v to 5.5v (recommend vr5, do not use v25) source. leave floating if not used.? for the sgnd pin, added ?all pin-strap resistors should be connected to sgnd. sgnd must be connected to dgnd and pgnd using a single point connection.? for the sa pin, added ?connect resistor to sgnd.? for vset0, added ?default vout max is 115% of vout setting, but this can be overridden through the pmbus interface with the vout_max command. connect resistor to sgnd.? for vset1, added ?default vout max is 115% of vout setting, but this can be overridden through the pmbus interface with the vout_max command. connect resi stor to sgnd. not used in 2-phase mode. leave floating in 2-phase mode.? for xtemp0p, xtemp0n, vtrkp, and vtrkn, added ?if not used connect to sgnd.? for vdrv, vr6, and vr5, added ?10f recommended.? for vsen1n, added ?in 2-channel or 2-phase mode.? for vsen1p, added ?in 2-channel or 2-phase mode.? in the ordering information table, added ?recommended for new designs? column. for 4bh iout_uc_fault_limit, changed the default setting to ?-20a?. for 65h toff_fall, changed the default setting to ?5ms?. for e7h iout_avg_oc_fault_limit, ch anged the default setting to ?16a?. for e8h iout_avg_uc_fault_limit, changed the default setting to ?-16a?. for 80h status_mfr_specific, reworded vmon_uv_warning and vmon_ov_warning for clarity. in the firmware revision history, added some previously undocumented firmware changes to the 1.06 revision. added a recommendation for 10uf bypass capacitor on vr5, vr6, and vdrv. added a recommendation to pull-up ddc to vr5. corrected several pmbus command descriptions to show correct default value and global or paged behavior.
fn7558 rev.6.00 page 87 of 88 nov 8, 2017 zl8800 intersil products are manufactured, assembled and tested utilizing iso9001 quality systems as noted in the quality certifications found at www.intersil.com/en/suppor t/qualandreliability.html intersil products are sold by description on ly. intersil may modify the circuit design an d/or specifications of products at any time without notice, provided that such modification does not, in intersil's sole judgment, affect the form, fit or function of the product. accordingly, the reader is cautioned to verify that datasheets are current before placing orders. information fu rnished by intersil is believed to be accu rate and reliable. however, no responsib ility is assumed by intersil or its subsidiaries for its use; nor for any infrin gements of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of intersil or its subsidiaries. for information regarding intersil corporation and its products, see www.intersil.com for additional products, see www.intersil.com/en/products.html ? copyright intersil americas llc 2013-2017. all rights reserved. all trademarks and registered trademarks are the property of their respective owners. about intersil intersil corporation is a leading provider of innovative power ma nagement and precision analog so lutions. the company's product s address some of the largest markets within the industrial and infrastr ucture, mobile computing and high-end consumer markets. for the most updated datasheet, application notes, related documentatio n and related parts, please see the respective product information page found at www.intersil.com . for a listing of definitions and abbreviations of common terms used in our documents, visit: www.intersil.com/glossary . you can report errors or suggestions for improving this datasheet by visiting www.intersil.com/ask . reliability reports are also av ailable from our website at www.intersil.com/support. may 1, 2017 fn7558.4 updated related literature section. applied new header/footer. updated ordering information table added zl8800alaft7a and zl8800albft7a clarified relationship between power_good_on and vout_uv_fault_limit thresholds in ?power-good? on page 15, the ?pmbus command summary? table, and the ?vout_uv_fault_limit (44h)? and ?power_good_on (5eh)? register descriptions. sept 14, 2015 fn7558.3 added related literature section on page 1. added key differences table to page 1. updated ordering information table on page 8 by adding zl8800albft and zl8800albftk part numbers, added firmware revision column, and added note 5. added legacy_fault_group command to ?pmbus command summary? on page 28 and in the command descriptions on page 79. changed reference to 30ms to 70ms, and 20 to 30ms to 60 to 70ms in ?start-up procedure? on page 15. added detail to ton_delay range description on page 48. added detail to ton_rise range description on page 48. added detail to toff_delay range description on page 49. added firmware revision history section. nov 11, 2013 fn7558.2 added ??? to chargemode - page 1 title, third paragraph and trademark statement. oct 10, 2013 fn7558.1 the maximum ramp-up time and ramp-dow n time changed from 200ms to 100ms: pages 10, 47, 48. the maximum soft-start delay, turn-off delay, and power-good delay changed on pages 47, 48 and 62 to 5 seconds to match the limits in the ec table (page 10). the second table on page 60. the location and size of the bit field for minimum duty cycle changed from 2 bits in location 9:8 to 5 bits in location 15:11. sept 18, 2013 fn7558.0 initial release revision history the revision history provided is for in formational purposes only and is believ ed to be accurate, but not warranted. please visit our website to make sure you have the latest revision. (continued) date revision change
zl8800 fn7558 rev.6.00 page 88 of 88 nov 8, 2017 package outline drawing l44.7x7b 44 lead quad flat no-lead plastic package rev 0, 10/09 located within the zone indicated. the pin #1 identifier may be unless otherwise specified, tolerance : decimal 0.05 tiebar shown (if present) is a non-functional feature. the configuration of the pin #1 identifier is optional, but mus t be between 0.15mm and 0.30mm from the terminal tip. dimension b applies to the metal lized terminal and is measured dimensions in ( ) for reference only. dimensioning and tolerancing conform to amse y14.5m-1994. 6. either a mold or mark feature. 3. 5. 4. 2. dimensions are in millimeters. 1. notes: bottom view detail "x" side view typical recommended land pattern top view c 0.2 ref 0 . 05 max. 0 . 00 min. 5 7.00 a b 7.00 (4x) 0.15 6 pin 1 index 34 pin #1 44 5.00 typ 40x 0.50 exp. dap 11 1 33 22 44x 0.55 0.1 12 6 ( 44 x 0.75) (44x .25) ( 40x 0.50) ( 6.65 ) ( 5.20) 5.20 0.1 exp. dap 0.10 44x 0.25 a mc b 4 5.20 0.1 1.00 max see detail "x" 0.08 0.10 c c c ( 6.65 ) ( 5.20 ) 23 index area area side view complies to jedec mo220 vkkd-1. 7. for the most recent package outline drawing, see l44.7x7b .

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